From patchwork Fri Feb 24 15:04:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 94484 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp728299qgi; Fri, 24 Feb 2017 07:05:12 -0800 (PST) X-Received: by 10.98.98.69 with SMTP id w66mr3880078pfb.41.1487948712031; Fri, 24 Feb 2017 07:05:12 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id b10si1772400plk.334.2017.02.24.07.05.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 24 Feb 2017 07:05:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 8E77E82145; Fri, 24 Feb 2017 07:05:11 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x234.google.com (mail-wm0-x234.google.com [IPv6:2a00:1450:400c:c09::234]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 07D5881D77 for ; Fri, 24 Feb 2017 07:05:10 -0800 (PST) Received: by mail-wm0-x234.google.com with SMTP id v77so16557622wmv.1 for ; Fri, 24 Feb 2017 07:05:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=igZoV7AQ3PUnmkt4nmhLtMJaGR+e0YyS4h7zrFfbUDQ=; b=X+eQJtOyIN7p1mnG2akul5Axj6XT7QBtg5QJV8Nj9zMEYyIwgNrohVM69DizvIbWFQ YV/Eft4Z/SmgRZrPpmZ9Nt0F2i3dGq9mX8gHFS70p11fVKb4EtNcHLDC6V21nviX/1B4 y40rqMFVDwhuYRnvbbZcMRLOYFxgzNXNdGC2k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=igZoV7AQ3PUnmkt4nmhLtMJaGR+e0YyS4h7zrFfbUDQ=; b=cX0NjUfLBpm390TFrY5+jfX7gxc9IPAPikh+N9ZFquZBBeJ21cbkkYumzU8wri5fhU PBXwFh+ZTbLeggIahG9lYU9ATVaJcaUvCyTmMGzxNafOtn4q+coZO8sj2IO9JjXd2i5r jjgMg54YYoGvx7Vf7AMc48Q07om650XaDoioIAl/ZHidVU6CPYT5h+eev+1Nw8Am5sB1 kPzOkGi/8M36G6pkIurlOWtQU7EPxGyJJcQUBEkHeTzkaqpaxITB0iOuEGPvai23NYWh /MtP4QPB8kstPNV0mAKzyRJHxboKzkAAHd5PYgerzw72XXwwOoZ0dAhnXmIBFzjRHMWZ w5LA== X-Gm-Message-State: AMke39lU8QPSSXg5gzpv7ZNuvmd8MdXTjLoxptyWo7TdVzPzyqJVxD7dR0UZN3pMpjd17Sli X-Received: by 10.28.165.70 with SMTP id o67mr768383wme.123.1487948708590; Fri, 24 Feb 2017 07:05:08 -0800 (PST) Received: from localhost.localdomain ([105.149.201.216]) by smtp.gmail.com with ESMTPSA id w207sm2687048wmw.1.2017.02.24.07.05.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Feb 2017 07:05:07 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, afish@apple.com, leif.lindholm@linaro.org, michael.d.kinney@intel.com, liming.gao@intel.com, jiewen.yao@intel.com Date: Fri, 24 Feb 2017 15:04:55 +0000 Message-Id: <1487948699-3179-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487948699-3179-1-git-send-email-ard.biesheuvel@linaro.org> References: <1487948699-3179-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v2 1/5] ArmPkg/CpuDxe: ignore attribute changes during SyncCacheConfig() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: feng.tian@intel.com, lersek@redhat.com, star.zeng@intel.com, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" To prevent the initial MMU->GCD memory space map synchronization from stripping permissions attributes [which we cannot use in the GCD memory space map, unfortunately], implement the same approach as x86, and ignore SetMemoryAttributes() calls during the time SyncCacheConfig() is in progress. This is a horrible hack, but is currently the only way we can implement strict permissions on arbitrary memory regions [as opposed to PE/COFF text/data sections only] Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- ArmPkg/Drivers/CpuDxe/CpuDxe.c | 3 +++ ArmPkg/Drivers/CpuDxe/CpuDxe.h | 1 + ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 4 ++++ 3 files changed, 8 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.c b/ArmPkg/Drivers/CpuDxe/CpuDxe.c index 5aa5b874144a..1955d1dece03 100644 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.c +++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.c @@ -17,6 +17,7 @@ #include +BOOLEAN gIsFlushingGCD; /** This function flushes the range of addresses from Start to Start+Length @@ -261,7 +262,9 @@ CpuDxeInitialize ( // and that calls EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes, so this code needs to go // after the protocol is installed // + gIsFlushingGCD = TRUE; SyncCacheConfig (&mCpu); + gIsFlushingGCD = FALSE; // If the platform is a MPCore system then install the Configuration Table describing the // secondary core states diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.h b/ArmPkg/Drivers/CpuDxe/CpuDxe.h index a00fc3064362..085e4cab2921 100644 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.h +++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.h @@ -37,6 +37,7 @@ #include #include +extern BOOLEAN gIsFlushingGCD; /** This function registers and enables the handler specified by InterruptHandler for a processor diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c index ebe593d1c325..6dfec7e55888 100644 --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c +++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c @@ -188,6 +188,10 @@ CpuSetMemoryAttributes ( UINTN RegionLength; UINTN RegionArmAttributes; + if (gIsFlushingGCD) { + return EFI_SUCCESS; + } + if ((BaseAddress & (SIZE_4KB - 1)) != 0) { // Minimum granularity is SIZE_4KB (4KB on ARM) DEBUG ((EFI_D_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum ganularity is SIZE_4KB\n", BaseAddress, Length, EfiAttributes)); From patchwork Fri Feb 24 15:04:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 94485 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp728320qgi; Fri, 24 Feb 2017 07:05:14 -0800 (PST) X-Received: by 10.84.133.163 with SMTP id f32mr4432722plf.64.1487948714398; Fri, 24 Feb 2017 07:05:14 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id 69si7570322pgc.364.2017.02.24.07.05.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 24 Feb 2017 07:05:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C2B9582171; Fri, 24 Feb 2017 07:05:13 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x22b.google.com (mail-wm0-x22b.google.com [IPv6:2a00:1450:400c:c09::22b]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 50B7F82161 for ; Fri, 24 Feb 2017 07:05:12 -0800 (PST) Received: by mail-wm0-x22b.google.com with SMTP id v186so16712548wmd.0 for ; Fri, 24 Feb 2017 07:05:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bo3RDMGP0os0yZ1FCiCOmHWWahEhdZ9oNlsN0M4viw4=; b=j76Qu0Gs7FVAhEuP0qLOMqqoQuZEMNwiby5eZ+2+XRECJqvKHGgbpPNpHF/9JVImkF WfFbeqRBRfSed0FP2DAd4d0FS6thTmdFZJCtl4wVlP7o6LA5hs75yjixdk5j7XfNh/Ua MHz9SkUlV4eXhsWT+uA9YZ5xomvcCA/T0no2I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bo3RDMGP0os0yZ1FCiCOmHWWahEhdZ9oNlsN0M4viw4=; b=DU0mcLgoPJWNl36pHXPNS0/JvQdw7JpN2GnBW9lpD5n1l0zs0PJx6A4A6ps+uAz+0z NoorQhL0Z/9gpcDolk2dTMfx7gOh0UfaYBGNo9MySLA7x9xibOc3xz7j/bGSEjwmTzPi sMx6zlhbK66EuBDm2npv/q3qL1/kfEp4aWc/1nQGA+VAqpRbA6hP2QOnGWU48YXgNJnv DidcYFLs4mK6xVmi17poUNBFtTA4uy+rg1+KDij9exj+yaPO5pdhhwyX7Jif7hXzwlWW 2hjfKhyOP/44KsHJSYj2rhYsOYuhQYP4MZCe7Z++vBXc+kIkOMMDV2jJc+O79jxWuVNw 0EeQ== X-Gm-Message-State: AMke39knkYV9AGw1VZ0aUJheVxt9i+5d9/wIgGEe+d3F1kOuShTnfwFpkxe5Nx1D9qaj9Eyl X-Received: by 10.28.166.199 with SMTP id p190mr3151595wme.25.1487948710903; Fri, 24 Feb 2017 07:05:10 -0800 (PST) Received: from localhost.localdomain ([105.149.201.216]) by smtp.gmail.com with ESMTPSA id w207sm2687048wmw.1.2017.02.24.07.05.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Feb 2017 07:05:10 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, afish@apple.com, leif.lindholm@linaro.org, michael.d.kinney@intel.com, liming.gao@intel.com, jiewen.yao@intel.com Date: Fri, 24 Feb 2017 15:04:56 +0000 Message-Id: <1487948699-3179-3-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487948699-3179-1-git-send-email-ard.biesheuvel@linaro.org> References: <1487948699-3179-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v2 2/5] MdeModulePkg/PeiCore: allocate BootServicesCode memory for PE/COFF images X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: feng.tian@intel.com, lersek@redhat.com, star.zeng@intel.com, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Ensure that any memory allocated for PE/COFF images is identifiable as a boot services code region, so that we know it requires its executable permissions to be preserved when we tighten mapping permissions later on. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- MdeModulePkg/Core/Pei/Image/Image.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdeModulePkg/Core/Pei/Image/Image.c b/MdeModulePkg/Core/Pei/Image/Image.c index d659de8b3e64..8cc9ed93e9b6 100644 --- a/MdeModulePkg/Core/Pei/Image/Image.c +++ b/MdeModulePkg/Core/Pei/Image/Image.c @@ -453,12 +453,16 @@ LoadAndRelocatePeCoffImage ( // // The PEIM is not assiged valid address, try to allocate page to load it. // - ImageContext.ImageAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) AllocatePages (EFI_SIZE_TO_PAGES ((UINT32) AlignImageSize)); + Status = PeiServicesAllocatePages (EfiBootServicesCode, + EFI_SIZE_TO_PAGES ((UINT32) AlignImageSize), + &ImageContext.ImageAddress); } } else { - ImageContext.ImageAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) AllocatePages (EFI_SIZE_TO_PAGES ((UINT32) AlignImageSize)); + Status = PeiServicesAllocatePages (EfiBootServicesCode, + EFI_SIZE_TO_PAGES ((UINT32) AlignImageSize), + &ImageContext.ImageAddress); } - if (ImageContext.ImageAddress != 0) { + if (!EFI_ERROR (Status)) { // // Adjust the Image Address to make sure it is section alignment. // From patchwork Fri Feb 24 15:04:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 94486 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp728358qgi; Fri, 24 Feb 2017 07:05:17 -0800 (PST) X-Received: by 10.84.172.1 with SMTP id m1mr4453742plb.5.1487948717383; Fri, 24 Feb 2017 07:05:17 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id 78si7588640pgh.202.2017.02.24.07.05.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 24 Feb 2017 07:05:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 00F2482164; Fri, 24 Feb 2017 07:05:16 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wr0-x235.google.com (mail-wr0-x235.google.com [IPv6:2a00:1450:400c:c0c::235]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CB60D82164 for ; Fri, 24 Feb 2017 07:05:14 -0800 (PST) Received: by mail-wr0-x235.google.com with SMTP id o22so9319247wro.1 for ; Fri, 24 Feb 2017 07:05:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ry1ipyrL6ZsNhWbUSOe31tUIKoFxO6pcpsUY8K8z6lE=; b=cXeGEnrp5PVkHqtmzMt3Rhah8wP7WmQfyPX5MTnIPyU1xfUrVJmPKWaFUFcjBR9ugG 045LZyzvoXwS2zvynTsyE9CwR4Ujsj5Z/I/7XUw30N2X96PyIJ5NrNbs2eeiptdY96C0 Moo1W7W0Y8ah1tA1QFGXmkw2Tsy8FJJjiz8pY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ry1ipyrL6ZsNhWbUSOe31tUIKoFxO6pcpsUY8K8z6lE=; b=KVlbqCJv9ZOd02eEN1/cXpuUcc1+UZYr/lkcu3RRFm2FUb38FaBbYCVfF5uOf8s2CS ZjABDXHp5vZpA3Dsyfm2zphONcRTj23YCUZMlP2FwnBt6dFd77m0pf7+3IkVm4zuGyGy /tcTe8Ry2DWdmSCOuma64tt06eHrWbHUyCiiv/Wn5Ie8/eELZqV8mINHW6Ln8DYTMMwU lyVZkDWL8LEO/aJk3f27SWKBOATdhPYoUK603F8h9EcTgQwOrFBSZgzyR/JRECLsBmcu +ULASdMDj+ITW8pdg8AO/EloHTN+HHXjOHvhIXtZ+/UljUj0ZwLOGAUVNLi4jT5Wfp6z TPGg== X-Gm-Message-State: AMke39l2u0z/ofvYrDsF/FCZ1uswqLNxjWr18QMyncvJWrMDwQlGugXDektVU/1LbUiF90gH X-Received: by 10.223.163.20 with SMTP id c20mr3315808wrb.114.1487948713266; Fri, 24 Feb 2017 07:05:13 -0800 (PST) Received: from localhost.localdomain ([105.149.201.216]) by smtp.gmail.com with ESMTPSA id w207sm2687048wmw.1.2017.02.24.07.05.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Feb 2017 07:05:12 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, afish@apple.com, leif.lindholm@linaro.org, michael.d.kinney@intel.com, liming.gao@intel.com, jiewen.yao@intel.com Date: Fri, 24 Feb 2017 15:04:57 +0000 Message-Id: <1487948699-3179-4-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487948699-3179-1-git-send-email-ard.biesheuvel@linaro.org> References: <1487948699-3179-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v2 3/5] MdeModulePkg/DxeCore: pass pool type to CoreFreePoolPages () X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: feng.tian@intel.com, lersek@redhat.com, star.zeng@intel.com, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" In order to make it easier to manage memory permission attributes of page allocations performed on behalf of the pool allocator, pass the pool type when freeing pages. This way, we can easily check whether the freed pages need to have their permission attributes changed. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- MdeModulePkg/Core/Dxe/Mem/Imem.h | 2 ++ MdeModulePkg/Core/Dxe/Mem/Page.c | 1 + MdeModulePkg/Core/Dxe/Mem/Pool.c | 5 +++-- 3 files changed, 6 insertions(+), 2 deletions(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdeModulePkg/Core/Dxe/Mem/Imem.h b/MdeModulePkg/Core/Dxe/Mem/Imem.h index fb53f95575f0..fde533100d37 100644 --- a/MdeModulePkg/Core/Dxe/Mem/Imem.h +++ b/MdeModulePkg/Core/Dxe/Mem/Imem.h @@ -77,12 +77,14 @@ CoreAllocatePoolPages ( /** Internal function. Frees pool pages allocated via AllocatePoolPages () + @param PoolType The memory type of the pool pages @param Memory The base address to free @param NumberOfPages The number of pages to free **/ VOID CoreFreePoolPages ( + IN EFI_MEMORY_TYPE PoolType, IN EFI_PHYSICAL_ADDRESS Memory, IN UINTN NumberOfPages ); diff --git a/MdeModulePkg/Core/Dxe/Mem/Page.c b/MdeModulePkg/Core/Dxe/Mem/Page.c index bda4f6397e91..6330d41e7b3b 100644 --- a/MdeModulePkg/Core/Dxe/Mem/Page.c +++ b/MdeModulePkg/Core/Dxe/Mem/Page.c @@ -1871,6 +1871,7 @@ CoreAllocatePoolPages ( **/ VOID CoreFreePoolPages ( + IN EFI_MEMORY_TYPE PoolType, IN EFI_PHYSICAL_ADDRESS Memory, IN UINTN NumberOfPages ) diff --git a/MdeModulePkg/Core/Dxe/Mem/Pool.c b/MdeModulePkg/Core/Dxe/Mem/Pool.c index 7afd2d312c1d..9e15e0cfb5b2 100644 --- a/MdeModulePkg/Core/Dxe/Mem/Pool.c +++ b/MdeModulePkg/Core/Dxe/Mem/Pool.c @@ -624,7 +624,7 @@ CoreFreePoolI ( // NoPages = EFI_SIZE_TO_PAGES(Size) + EFI_SIZE_TO_PAGES (Granularity) - 1; NoPages &= ~(UINTN)(EFI_SIZE_TO_PAGES (Granularity) - 1); - CoreFreePoolPages ((EFI_PHYSICAL_ADDRESS) (UINTN) Head, NoPages); + CoreFreePoolPages (Pool->MemoryType, (EFI_PHYSICAL_ADDRESS) (UINTN) Head, NoPages); } else { @@ -680,7 +680,8 @@ CoreFreePoolI ( // // Free the page // - CoreFreePoolPages ((EFI_PHYSICAL_ADDRESS) (UINTN)NewPage, EFI_SIZE_TO_PAGES (Granularity)); + CoreFreePoolPages (Pool->MemoryType, (EFI_PHYSICAL_ADDRESS) (UINTN)NewPage, + EFI_SIZE_TO_PAGES (Granularity)); } } } From patchwork Fri Feb 24 15:04:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 94487 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp728383qgi; Fri, 24 Feb 2017 07:05:20 -0800 (PST) X-Received: by 10.99.8.194 with SMTP id 185mr4099928pgi.76.1487948720437; Fri, 24 Feb 2017 07:05:20 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id n64si233827pfj.43.2017.02.24.07.05.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 24 Feb 2017 07:05:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 30CC28217E; Fri, 24 Feb 2017 07:05:19 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x231.google.com (mail-wm0-x231.google.com [IPv6:2a00:1450:400c:c09::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E873B8217E for ; Fri, 24 Feb 2017 07:05:17 -0800 (PST) Received: by mail-wm0-x231.google.com with SMTP id v77so16586106wmv.0 for ; Fri, 24 Feb 2017 07:05:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=52yooIEdiISiLV9Hy6Kl4VlCrQFT4xMyOMgF/FTqR78=; b=A1iuM5cQ/IdheTE14frlZY6OM7ZODaIo546/mqD1ANnIjVY9WdBGFoOKnDzUiF/5mS TFAWBNh+PR3Z3NAhWaufzihty+GOjhQOE204Aej68cRA5sX6oLAerUEREgN7MOv25ofD jqzu8VBYweAX8OcPqYJMnj8pUXQLxnbNYhoKk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=52yooIEdiISiLV9Hy6Kl4VlCrQFT4xMyOMgF/FTqR78=; b=O0aVgZvMerbzQMy00ABFm2JLAaLmdngKFG3UkZ+1TXHI+ftwrC6jqNLHF4x5oSKbob ZojSGOKNjCXatI+PVV4GLaeByd4NHAKw3Xcy7WlfdDbJw4UG54iQ4hLCHlp9n0RRD2JU IdByti0MVUfyFp3fw8kKqNncaSuMrywYkLLh/x4ZcwhCIWh6U2NUWA69fqHYFReR4eeJ yofVJbZJM3KlGn+RQ/+5Ncq/h/vM5NOLYbsjD+6BNmVSLNdL0Xxpwy3RDr0emCYF0XoE Ho/Tmp7utfUZTHAfMsTyKsQ//dmTevOwImoPHwoj1oNqCuIRwj7N6N/DJYxAAY34Mxa/ 10Fw== X-Gm-Message-State: AMke39nUIpphiF/p0hYapGVerift4lBQHsCteViJpeQd3BDuDKrhFfg8BAv49rDUkBWpnowU X-Received: by 10.28.45.213 with SMTP id t204mr3053192wmt.113.1487948715896; Fri, 24 Feb 2017 07:05:15 -0800 (PST) Received: from localhost.localdomain ([105.149.201.216]) by smtp.gmail.com with ESMTPSA id w207sm2687048wmw.1.2017.02.24.07.05.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Feb 2017 07:05:15 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, afish@apple.com, leif.lindholm@linaro.org, michael.d.kinney@intel.com, liming.gao@intel.com, jiewen.yao@intel.com Date: Fri, 24 Feb 2017 15:04:58 +0000 Message-Id: <1487948699-3179-5-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487948699-3179-1-git-send-email-ard.biesheuvel@linaro.org> References: <1487948699-3179-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v2 4/5] MdeModulePkg: define PCD for DXE memory protection policy X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: feng.tian@intel.com, lersek@redhat.com, star.zeng@intel.com, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Define a new fixed/patchable PCD that sets the DXE memory protection policy: its primary use is to define which memory types should have their executable permissions removed. Combined with the image protection policy, this can be used to implement a strict W^X policy, i.e.. a policy where no regions exist that are both executable and writable at the same time. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- MdeModulePkg/MdeModulePkg.dec | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 426634fbbd4d..ea64cdf3772d 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -1107,6 +1107,22 @@ [PcdsFixedAtBuild, PcdsPatchableInModule] # @ValidRange 0x80000002 | 0x00000000 - 0x0000001F gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy|0x00000002|UINT32|0x00001047 + ## Set DXE memory protection policy. The policy is bitwise. + # If a bit is set, memory regions of the associated type will be mapped + # non-executable.

+ # BIT0 - EfiLoaderData.
+ # - EfiBootServicesData.
+ # - EfiRuntimeServicesData.
+ # - EfiConventionalMemory.
+ # - EfiUnusableMemory.
+ # - EfiPersistentMemory.
+ # - EfiACPIReclaimMemory.
+ # BIT1 - EfiReservedMemoryType.
+ # BIT2 - EfiACPIMemoryNVS.
+ # @Prompt Set DXE memory protection policy. + # @ValidRange 0x80000002 | 0x00000000 - 0x00000007 + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeMemoryProtectionPolicy|0x0000007|UINT32|0x00001048 + ## PCI Serial Device Info. It is an array of Device, Function, and Power Management # information that describes the path that contains zero or more PCI to PCI briges # followed by a PCI serial device. Each array entry is 4-bytes in length. The From patchwork Fri Feb 24 15:04:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 94488 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp728428qgi; Fri, 24 Feb 2017 07:05:24 -0800 (PST) X-Received: by 10.98.11.9 with SMTP id t9mr3937617pfi.123.1487948724177; Fri, 24 Feb 2017 07:05:24 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id b69si7596111pli.199.2017.02.24.07.05.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 24 Feb 2017 07:05:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 640458215F; Fri, 24 Feb 2017 07:05:22 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x229.google.com (mail-wm0-x229.google.com [IPv6:2a00:1450:400c:c09::229]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 52F3882199 for ; Fri, 24 Feb 2017 07:05:20 -0800 (PST) Received: by mail-wm0-x229.google.com with SMTP id r141so16685910wmg.1 for ; Fri, 24 Feb 2017 07:05:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=b2JBYvdI4qmV/nPeMobfaSPi/vNCK8Qq4r8WPG95EkI=; b=KpTds9QGq157de0nVnnMESBtWXz2THeTkuMoRzAkPuzDGSlt1POT/bevRb64V0UNrv +Ap1Nl4EQGaaPp9nI3YEim43SscdhOH0W7aIko+qVjgA8OPdtzPqj7JjMn0d3dzsl+W3 ZZEUAVXm2YM9Y+mOOI6egI3nt4iTux9JPAXcw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=b2JBYvdI4qmV/nPeMobfaSPi/vNCK8Qq4r8WPG95EkI=; b=IwxBcz0Jbb9dDpTFdn1/1Idtv15lRzXwhPl8qWCi1kQVIS5DTeyCKF7pX7eqi0QtKP yZbSOM5GTuZTNOFlwY02NRo+u7de1HpjlZ2GkkDeNZzLSmM+objp5RKzjpOBReuRPk3E Xch3hjkznO1/jCIEWeEIX+Jas0Aj0q4ticOnCQ/3Bvq8EVEUgqPsMbVsyLa4C36BJ9nW GA3JsJjHn/szXG0gHQonxX1u1UbRwj9KXUYOnEH2tr/XbGLkCrjcSCu7AR12RRo30ugw j7bbLKo/I4BRdWQkBaJh4KlR1sWfdmHdFtw4onebjf5Y7D18PqfTNvdz8ZxkpWYN6Gsz rbvA== X-Gm-Message-State: AMke39n1VDzuMYZcxTWLfIRwJUY0mwIfSoL4Q4bb8xOyhBdGAXU1DueyAUeIEUl1q7yEd0Io X-Received: by 10.28.217.136 with SMTP id q130mr3237902wmg.13.1487948718719; Fri, 24 Feb 2017 07:05:18 -0800 (PST) Received: from localhost.localdomain ([105.149.201.216]) by smtp.gmail.com with ESMTPSA id w207sm2687048wmw.1.2017.02.24.07.05.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Feb 2017 07:05:17 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, afish@apple.com, leif.lindholm@linaro.org, michael.d.kinney@intel.com, liming.gao@intel.com, jiewen.yao@intel.com Date: Fri, 24 Feb 2017 15:04:59 +0000 Message-Id: <1487948699-3179-6-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487948699-3179-1-git-send-email-ard.biesheuvel@linaro.org> References: <1487948699-3179-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v2 5/5] MdeModulePkg/DxeCore: implement memory protection policy X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: feng.tian@intel.com, lersek@redhat.com, star.zeng@intel.com, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" This implements a DXE memory protection policy that ensure that regions that don't require executable permissions are mapped with the non-exec attribute set. First of all, it iterates over all entries in the UEFI memory map, and removes executable permissions according to the configured DXE memory protection policy, as recorded in PcdDxeMemoryProtectionPolicy. Secondly, it sets or clears the non-executable attribute when allocating or freeing pages, both for page based or pool based allocations. Note that this complements the image protection facility, which applies strict permissions to BootServicesCode/RuntimeServicesCode regions when the section alignment allows it. The memory protection configured by this patch operates on non-code regions only. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- MdeModulePkg/Core/Dxe/DxeMain.inf | 1 + MdeModulePkg/Core/Dxe/Mem/Page.c | 105 ++++++++++++++++++++ MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c | 104 ++++++++++++++++++- 3 files changed, 209 insertions(+), 1 deletion(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdeModulePkg/Core/Dxe/DxeMain.inf b/MdeModulePkg/Core/Dxe/DxeMain.inf index 371e91cb0d7e..871868dbf305 100644 --- a/MdeModulePkg/Core/Dxe/DxeMain.inf +++ b/MdeModulePkg/Core/Dxe/DxeMain.inf @@ -191,6 +191,7 @@ [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdMemoryProfileDriverPath ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeMemoryProtectionPolicy ## CONSUMES # [Hob] # RESOURCE_DESCRIPTOR ## CONSUMES diff --git a/MdeModulePkg/Core/Dxe/Mem/Page.c b/MdeModulePkg/Core/Dxe/Mem/Page.c index 6330d41e7b3b..569238c77f98 100644 --- a/MdeModulePkg/Core/Dxe/Mem/Page.c +++ b/MdeModulePkg/Core/Dxe/Mem/Page.c @@ -1305,6 +1305,101 @@ Done: } /** + Return the EFI memory permission attribute associated with memory type 'Type' + under the configured DXE memory protection policy. +**/ +STATIC +UINT64 +EFIAPI +GetPermissionAttributeForMemoryType ( + IN EFI_MEMORY_TYPE Type + ) +{ + switch (Type) { + case EfiBootServicesCode: + case EfiRuntimeServicesCode: + case EfiLoaderCode: + break; + + default: + if ((PcdGet32 (PcdDxeMemoryProtectionPolicy) & BIT0) != 0) { + return EFI_MEMORY_XP; + } + break; + case EfiReservedMemoryType: + if ((PcdGet32 (PcdDxeMemoryProtectionPolicy) & BIT1) != 0) { + return EFI_MEMORY_XP; + } + break; + case EfiACPIMemoryNVS: + if ((PcdGet32 (PcdDxeMemoryProtectionPolicy) & BIT2) != 0) { + return EFI_MEMORY_XP; + } + break; + } + return 0; +} + +/** + Manage memory permission attributes on a memory range, according to the + configured DXE memory protection policy. + + @param OldType The old memory type of the range + @param NewType The new memory type of the range + @param Memory The base address of the range + @param Length The size of the range (in bytes) + + @return EFI_SUCCESS If the the CPU arch protocol is not installed yet + @return EFI_SUCCESS If no DXE memory protection policy has been configured + @return EFI_SUCCESS If OldType and NewType use the same permission attributes + @return other Return value of gCpu->SetMemoryAttributes() + +**/ +STATIC +EFI_STATUS +EFIAPI +ApplyMemoryProtection ( + IN EFI_MEMORY_TYPE OldType, + IN EFI_MEMORY_TYPE NewType, + IN EFI_PHYSICAL_ADDRESS Memory, + IN UINT64 Length + ) +{ + UINT64 OldAttributes; + UINT64 NewAttributes; + + // + // If the CPU arch protocol is not installed yet, we cannot manage memory + // permission attributes, and it is the job of the driver that installs this + // protocol to set the permissions on existing allocations. + // + if (gCpu == NULL) { + return EFI_SUCCESS; + } + + // + // Check if a DXE memory protection policy has been configured + // + if (PcdGet32 (PcdDxeMemoryProtectionPolicy) == 0) { + return EFI_SUCCESS; + } + + // + // Update the executable permissions according to the DXE memory + // protection policy, but only if the policy is different between + // the old and the new type. + // + OldAttributes = GetPermissionAttributeForMemoryType (OldType); + NewAttributes = GetPermissionAttributeForMemoryType (NewType); + + if (OldAttributes == NewAttributes) { + return EFI_SUCCESS; + } + + return gCpu->SetMemoryAttributes (gCpu, Memory, Length, NewAttributes); +} + +/** Allocates pages from the memory map. @param Type The type of allocation to perform @@ -1344,6 +1439,8 @@ CoreAllocatePages ( NULL ); InstallMemoryAttributesTableOnMemoryAllocation (MemoryType); + ApplyMemoryProtection (EfiConventionalMemory, MemoryType, *Memory, + EFI_PAGES_TO_SIZE (NumberOfPages)); } return Status; } @@ -1460,6 +1557,8 @@ CoreFreePages ( NULL ); InstallMemoryAttributesTableOnMemoryAllocation (MemoryType); + ApplyMemoryProtection (MemoryType, EfiConventionalMemory, Memory, + EFI_PAGES_TO_SIZE (NumberOfPages)); } return Status; } @@ -1856,6 +1955,9 @@ CoreAllocatePoolPages ( DEBUG ((DEBUG_ERROR | DEBUG_PAGE, "AllocatePoolPages: failed to allocate %d pages\n", (UINT32)NumberOfPages)); } else { CoreConvertPages (Start, NumberOfPages, PoolType); + + ApplyMemoryProtection (EfiConventionalMemory, PoolType, Start, + EFI_PAGES_TO_SIZE (NumberOfPages)); } return (VOID *)(UINTN) Start; @@ -1877,6 +1979,9 @@ CoreFreePoolPages ( ) { CoreConvertPages (Memory, NumberOfPages, EfiConventionalMemory); + + ApplyMemoryProtection (PoolType, EfiConventionalMemory, Memory, + EFI_PAGES_TO_SIZE (NumberOfPages)); } diff --git a/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c b/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c index c36612a1b1f2..1142dcc5a83d 100644 --- a/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c +++ b/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c @@ -639,6 +639,97 @@ UnprotectUefiImage ( } /** + Remove exec permissions from all regions whose type is identified by + PcdDxeMemoryProtectionPolicy +**/ +STATIC +VOID +ApplyDxeMemoryProtectionPolicy ( + VOID + ) +{ + UINTN MemoryMapSize; + UINTN MapKey; + UINTN DescriptorSize; + UINT32 DescriptorVersion; + EFI_MEMORY_DESCRIPTOR *MemoryMap; + EFI_MEMORY_DESCRIPTOR *MemoryMapEntry; + EFI_MEMORY_DESCRIPTOR *MemoryMapEnd; + EFI_STATUS Status; + + // + // Get the EFI memory map. + // + MemoryMapSize = 0; + MemoryMap = NULL; + + Status = gBS->GetMemoryMap ( + &MemoryMapSize, + MemoryMap, + &MapKey, + &DescriptorSize, + &DescriptorVersion + ); + ASSERT (Status == EFI_BUFFER_TOO_SMALL); + do { + MemoryMap = (EFI_MEMORY_DESCRIPTOR *) AllocatePool (MemoryMapSize); + ASSERT (MemoryMap != NULL); + Status = gBS->GetMemoryMap ( + &MemoryMapSize, + MemoryMap, + &MapKey, + &DescriptorSize, + &DescriptorVersion + ); + if (EFI_ERROR (Status)) { + FreePool (MemoryMap); + } + } while (Status == EFI_BUFFER_TOO_SMALL); + ASSERT_EFI_ERROR (Status); + + DEBUG((DEBUG_ERROR, "%a: removing exec permissions from memory regions\n", + __FUNCTION__)); + + for (MemoryMapEntry = MemoryMap, + MemoryMapEnd = (EFI_MEMORY_DESCRIPTOR *) ((UINT8 *) MemoryMap + MemoryMapSize); + (UINTN) MemoryMapEntry < (UINTN) MemoryMapEnd; + MemoryMapEntry = NEXT_MEMORY_DESCRIPTOR (MemoryMapEntry, DescriptorSize)) { + + switch (MemoryMapEntry->Type) { + case EfiBootServicesCode: + case EfiRuntimeServicesCode: + case EfiLoaderCode: + continue; + + default: + if ((PcdGet32 (PcdDxeMemoryProtectionPolicy) & BIT0) == 0) { + continue; + } + break; + + case EfiReservedMemoryType: + if ((PcdGet32 (PcdDxeMemoryProtectionPolicy) & BIT1) == 0) { + continue; + } + break; + + case EfiACPIMemoryNVS: + if ((PcdGet32 (PcdDxeMemoryProtectionPolicy) & BIT2) == 0) { + continue; + } + break; + } + + SetUefiImageMemoryAttributes ( + MemoryMapEntry->PhysicalStart, + EFI_PAGES_TO_SIZE (MemoryMapEntry->NumberOfPages), + EFI_MEMORY_XP); + } + FreePool (MemoryMap); +} + + +/** A notification for CPU_ARCH protocol. @param[in] Event Event whose notification function is being invoked. @@ -666,6 +757,17 @@ MemoryProtectionCpuArchProtocolNotify ( return; } + // + // Apply the memory protection policy on non-BScode/RTcode regions. + // + if (PcdGet32 (PcdDxeMemoryProtectionPolicy) != 0) { + ApplyDxeMemoryProtectionPolicy (); + } + + if (mImageProtectionPolicy == 0) { + return; + } + Status = gBS->LocateHandleBuffer ( ByProtocol, &gEfiLoadedImageProtocolGuid, @@ -745,7 +847,7 @@ CoreInitializeMemoryProtection ( mImageProtectionPolicy = PcdGet32(PcdImageProtectionPolicy); - if (mImageProtectionPolicy != 0) { + if (mImageProtectionPolicy != 0 || PcdGet32 (PcdDxeMemoryProtectionPolicy) != 0) { Status = CoreCreateEvent ( EVT_NOTIFY_SIGNAL, TPL_CALLBACK,