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Thu, 11 Jun 2020 05:57:08 +0000 From: Alexander Bulekov To: qemu-devel@nongnu.org Subject: [RFC PATCH 2/3] fuzz: add support for fuzzing DMA regions Date: Thu, 11 Jun 2020 01:56:50 -0400 Message-Id: <20200611055651.13784-3-alxndr@bu.edu> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200611055651.13784-1-alxndr@bu.edu> References: <20200611055651.13784-1-alxndr@bu.edu> X-ClientProxiedBy: BL0PR0102CA0056.prod.exchangelabs.com (2603:10b6:208:25::33) To SN6PR03MB3871.namprd03.prod.outlook.com (2603:10b6:805:6d::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from mozz.bu.edu (128.197.127.33) by BL0PR0102CA0056.prod.exchangelabs.com (2603:10b6:208:25::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3088.20 via Frontend Transport; Thu, 11 Jun 2020 05:57:07 +0000 X-Mailer: git-send-email 2.26.2 X-Originating-IP: [128.197.127.33] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 41b6f446-cd7b-475f-5ba2-08d80dcc4694 X-MS-TrafficTypeDiagnostic: SN6PR03MB4173: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:409; 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envelope-from=alxndr@bu.edu; helo=NAM11-DM6-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/11 01:57:41 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=1, MSGID_FROM_MTA_HEADER=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Alexander Bulekov , f4bug@amsat.org, darren.kenny@oracle.com, bsd@redhat.com, stefanha@redhat.com, Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Alexander Bulekov --- tests/qtest/fuzz/general_fuzz.c | 102 ++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/tests/qtest/fuzz/general_fuzz.c b/tests/qtest/fuzz/general_fuzz.c index 5c29306bb6..9e981e870f 100644 --- a/tests/qtest/fuzz/general_fuzz.c +++ b/tests/qtest/fuzz/general_fuzz.c @@ -32,6 +32,7 @@ * input */ #define CMD_SEP "\x84\x05\x5C\x5E" +#define MAX_DMA_FILL_SIZE 0x10000 typedef struct { size_t addr; @@ -57,6 +58,18 @@ typedef struct { */ char **region_whitelist; +/* + * List of dma regions populated since the last fuzzing command. Used to ensure + * that we only write to each DMA address once, to avoid race conditions when + * building reproducers. + */ +static GArray *dma_regions; + +static GArray *dma_patterns; +int dma_pattern_index; + +void dma_read_cb(size_t addr, size_t len); + /* * Allocate a block of memory and populate it with a pattern. */ @@ -76,6 +89,62 @@ static void *pattern_alloc(pattern p, size_t len) return buf; } +/* + * Call-back for functions that perform DMA reads from guest memory. Confirm + * that the region has not already been populated since the last loop in + * general_fuzz(), avoiding potential race-conditions, which we don't have + * a good way for reproducing right now. + */ +void dma_read_cb(size_t addr, size_t len) +{ + int i; + + /* Return immediately if we have no data to fill the dma region */ + if (dma_patterns->len == 0) { + return; + } + + /* Return immediately if the address is greater than the RAM size */ + if (addr > current_machine->ram_size) { + return; + } + + /* Cap the length of the DMA access to something reasonable */ + len = MIN(len, MAX_DMA_FILL_SIZE); + + /* + * If we overlap with any existing dma_regions, split the range and only + * populate the non-overlapping parts. + */ + for (i = 0; i < dma_regions->len; ++i) { + address_range *region = &g_array_index(dma_regions, address_range, i); + if (addr < region->addr + region->len && addr + len > region->addr) { + if (addr < region->addr) { + dma_read_cb(addr, region->addr - addr); + } + if (addr + len > region->addr + region->len) { + dma_read_cb(region->addr + region->len, + addr + len - (region->addr + region->len)); + } + return; + } + } + + /* + * Otherwise, populate the region using address_space_write_rom to avoid + * writing to any IO MemoryRegions + */ + address_range ar = {addr, len}; + g_array_append_val(dma_regions, ar); + void *buf = pattern_alloc(g_array_index(dma_patterns, pattern, + dma_pattern_index), ar.len); + address_space_write_rom(first_cpu->as, ar.addr, MEMTXATTRS_UNSPECIFIED, + buf, ar.len); + free(buf); + + /* Increment the index of the pattern for the next DMA access */ + dma_pattern_index = (dma_pattern_index + 1) % dma_patterns->len; +} /* * Here we want to convert a fuzzer-provided [io-region-index, offset] to @@ -269,6 +338,32 @@ static void op_write(QTestState *s, const unsigned char * data, size_t len) } } +static void op_add_dma_pattern(QTestState *s, + const unsigned char *data, size_t len) +{ + struct { + /* + * index and stride can be used to increment the index-th byte of the + * pattern by the value stride, for each loop of the pattern. + */ + uint8_t index; + uint8_t stride; + } a; + + if (len < sizeof(a) + 1) { + return; + } + memcpy(&a, data, sizeof(a)); + pattern p = {a.index, a.stride, len - sizeof(a), data + sizeof(a)}; + g_array_append_val(dma_patterns, p); + return; +} + +static void op_clear_dma_patterns(QTestState *s, + const unsigned char *data, size_t len) +{ + g_array_set_size(dma_patterns, 0); +} static void op_write_pattern(QTestState *s, const unsigned char * data, size_t len) @@ -341,6 +436,8 @@ static void general_fuzz(QTestState *s, const unsigned char *Data, size_t Size) op_out, op_read, op_write, + op_add_dma_pattern, + op_clear_dma_patterns, op_write_pattern, op_clock_step }; @@ -348,9 +445,12 @@ static void general_fuzz(QTestState *s, const unsigned char *Data, size_t Size) const unsigned char *nextcmd; size_t cmd_len; uint8_t op; + g_array_set_size(dma_patterns, 0); + dma_pattern_index = 0; if (fork() == 0) { while (cmd && Size) { + g_array_set_size(dma_regions, 0); /* Get the length until the next command or end of input */ nextcmd = memmem(cmd, Size, CMD_SEP, strlen(CMD_SEP)); cmd_len = nextcmd ? nextcmd - cmd : Size; @@ -418,6 +518,8 @@ static void general_pre_qos_fuzz(QTestState *s) } counter_shm_init(); + dma_regions = g_array_new(false, false, sizeof(address_range)); + dma_patterns = g_array_new(false, false, sizeof(pattern)); qos_init_path(s); From patchwork Thu Jun 11 05:56:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Bulekov X-Patchwork-Id: 280810 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,HK_RANDOM_FROM,INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBB84C433E0 for ; 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envelope-from=alxndr@bu.edu; helo=NAM11-DM6-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/11 01:57:41 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=1, MSGID_FROM_MTA_HEADER=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexander Bulekov , f4bug@amsat.org, darren.kenny@oracle.com, bsd@redhat.com, stefanha@redhat.com, Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Alexander Bulekov --- exec.c | 17 ++++++++++++++++- include/exec/memory.h | 8 ++++++++ include/exec/memory_ldst_cached.inc.h | 9 +++++++++ include/sysemu/dma.h | 5 ++++- memory_ldst.inc.c | 12 ++++++++++++ 5 files changed, 49 insertions(+), 2 deletions(-) diff --git a/exec.c b/exec.c index be4be2df3a..2ed724ab54 100644 --- a/exec.c +++ b/exec.c @@ -3247,7 +3247,10 @@ MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, { MemTxResult result = MEMTX_OK; FlatView *fv; - +#ifdef CONFIG_FUZZ + if(as->root == get_system_memory()) + dma_read_cb(addr, len); +#endif if (len > 0) { RCU_READ_LOCK_GUARD(); fv = address_space_to_flatview(as); @@ -3556,6 +3559,10 @@ void *address_space_map(AddressSpace *as, } *plen = l; +#ifdef CONFIG_FUZZ + if(as->root == get_system_memory() && !is_write) + dma_read_cb(addr, *plen); +#endif return bounce.buffer; } @@ -3563,6 +3570,10 @@ void *address_space_map(AddressSpace *as, memory_region_ref(mr); *plen = flatview_extend_translation(fv, addr, len, mr, xlat, l, is_write, attrs); +#ifdef CONFIG_FUZZ + if(as->root == get_system_memory() && !is_write) + dma_read_cb(addr, *plen); +#endif ptr = qemu_ram_ptr_length(mr->ram_block, xlat, plen, true); return ptr; @@ -3635,6 +3646,10 @@ int64_t address_space_cache_init(MemoryRegionCache *cache, assert(len > 0); +#ifdef CONFIG_FUZZ + if(as->root == get_system_memory() && !is_write) + dma_read_cb(addr, len); +#endif l = len; cache->fv = address_space_get_flatview(as); d = flatview_to_dispatch(cache->fv); diff --git a/include/exec/memory.h b/include/exec/memory.h index 3e00cdbbfa..e9178b3e0a 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -49,6 +49,10 @@ extern bool global_dirty_log; +#ifdef CONFIG_FUZZ +extern void dma_read_cb(size_t addr, size_t len); +#endif + typedef struct MemoryRegionOps MemoryRegionOps; typedef struct MemoryRegionMmio MemoryRegionMmio; @@ -2427,6 +2431,10 @@ address_space_read_cached(MemoryRegionCache *cache, hwaddr addr, void *buf, hwaddr len) { assert(addr < cache->len && len <= cache->len - addr); + +#ifdef CONFIG_FUZZ + dma_read_cb(addr, len); +#endif if (likely(cache->ptr)) { memcpy(buf, cache->ptr + addr, len); } else { diff --git a/include/exec/memory_ldst_cached.inc.h b/include/exec/memory_ldst_cached.inc.h index fd4bbb40e7..dc3ce14a97 100644 --- a/include/exec/memory_ldst_cached.inc.h +++ b/include/exec/memory_ldst_cached.inc.h @@ -28,6 +28,9 @@ static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 4 <= cache->len - addr); +#ifdef CONFIG_FUZZ + dma_read_cb(cache->xlat + addr, 4); +#endif if (likely(cache->ptr)) { return LD_P(l)(cache->ptr + addr); } else { @@ -39,6 +42,9 @@ static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 8 <= cache->len - addr); +#ifdef CONFIG_FUZZ + dma_read_cb(cache->xlat + addr, 8); +#endif if (likely(cache->ptr)) { return LD_P(q)(cache->ptr + addr); } else { @@ -50,6 +56,9 @@ static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 2 <= cache->len - addr); +#ifdef CONFIG_FUZZ + dma_read_cb(cache->xlat + addr, 2); +#endif if (likely(cache->ptr)) { return LD_P(uw)(cache->ptr + addr); } else { diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h index 80c5bc3e02..f32d7db7aa 100644 --- a/include/sysemu/dma.h +++ b/include/sysemu/dma.h @@ -105,8 +105,11 @@ static inline int dma_memory_rw(AddressSpace *as, dma_addr_t addr, void *buf, dma_addr_t len, DMADirection dir) { +#ifdef CONFIG_FUZZ + if (dir == DMA_DIRECTION_TO_DEVICE) + dma_read_cb(addr, len); +#endif dma_barrier(as, dir); - return dma_memory_rw_relaxed(as, addr, buf, len, dir); } diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c index c54aee4a95..1935436aff 100644 --- a/memory_ldst.inc.c +++ b/memory_ldst.inc.c @@ -42,6 +42,9 @@ static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL, MO_32 | devend_memop(endian), attrs); } else { /* RAM case */ +#ifdef CONFIG_FUZZ + dma_read_cb(addr, 4); +#endif ptr = qemu_map_ram_ptr(mr->ram_block, addr1); switch (endian) { case DEVICE_LITTLE_ENDIAN: @@ -110,6 +113,9 @@ static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL, MO_64 | devend_memop(endian), attrs); } else { /* RAM case */ +#ifdef CONFIG_FUZZ + dma_read_cb(addr, 8); +#endif ptr = qemu_map_ram_ptr(mr->ram_block, addr1); switch (endian) { case DEVICE_LITTLE_ENDIAN: @@ -175,6 +181,9 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, r = memory_region_dispatch_read(mr, addr1, &val, MO_8, attrs); } else { /* RAM case */ +#ifdef CONFIG_FUZZ + dma_read_cb(addr, 1); +#endif ptr = qemu_map_ram_ptr(mr->ram_block, addr1); val = ldub_p(ptr); r = MEMTX_OK; @@ -212,6 +221,9 @@ static inline uint32_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL, MO_16 | devend_memop(endian), attrs); } else { /* RAM case */ +#ifdef CONFIG_FUZZ + dma_read_cb(addr, 2); +#endif ptr = qemu_map_ram_ptr(mr->ram_block, addr1); switch (endian) { case DEVICE_LITTLE_ENDIAN: