From patchwork Wed Dec 20 03:23:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122426 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5023405qgn; Tue, 19 Dec 2017 19:24:17 -0800 (PST) X-Google-Smtp-Source: ACJfBos3S5umtDE4OdF09holvZPNU7dIqbMWMZk5sJ+6rSCniZVRvMpMX1tTSASiIZDz1fqQcBSC X-Received: by 10.98.7.149 with SMTP id 21mr5449853pfh.14.1513740257388; Tue, 19 Dec 2017 19:24:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513740257; cv=none; d=google.com; s=arc-20160816; b=QTBB7l9kswHHA1CAVTtMv1a1eoCkk0y/ERarQ5KU5QZSy8vlLypO9LCv8cz54XSpQg rxSqKN2cQxl+NEzyuTxeEEqYdYe/CPi5HQ7y13jIxf2rqiUUdQ65WQkdRLVvcqLHGT+G lnjYvkE7IxGpIfh4bvc42hyDPUzKt5eiP+fia6R6dRZfGKgr8lt94lMghwjNbMBeOu4Q 49Z8ABRM+4xIScL1gcWTQ1n0kmUd3hieT6BzQW6rSxBbY6YDNq4I179LKdnQidAfgehP ryxnl+wPFyCZZrvU0N5669McN/72ibusRw7jboVc1aPQA1iJalqryKAIEnF7V+6f63xa NS6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=PNasiNy6rFMiHmPQt47xEjbUmasBpA9TaOZ4PUtiLuQ=; b=yCNK/YkP5r1u0OHDinjwRvZiBDKDZ6APx8ryZuYDzFHIxkcmU/UXUS7psy34DO+QQ1 F+tiPOUC4Kr651VL/ruWp/r5VyURZuGIMjJTtGuoQhAFhX+ykirkAaUpPYOXn6oOVXsr cOm25K9EZKCHe1eMvN4+kPE7FWBvmfdMW6mXVYefj5ek7KWCE8v2bZ/yE0l7vTHGUoT0 2a1rifMjX4PVlb5GHYa8xxd2QD/uuFLZZCGQoQ78xg3YYlJs80lOYk4EANQEHnlfIbFr Ij8omuyoDZ8LaOCCWGnEwG2fFWUDH5C5fInNUKc/9IKdRfy2RUljHwYc51lk7dtNPs5+ 5qGg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=ZEpp+kwv; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u123si5906703pgb.688.2017.12.19.19.24.17; Tue, 19 Dec 2017 19:24:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=ZEpp+kwv; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754217AbdLTDYL (ORCPT + 28 others); Tue, 19 Dec 2017 22:24:11 -0500 Received: from mail-pl0-f67.google.com ([209.85.160.67]:40392 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752867AbdLTDYH (ORCPT ); Tue, 19 Dec 2017 22:24:07 -0500 Received: by mail-pl0-f67.google.com with SMTP id 62so6813780pld.7; Tue, 19 Dec 2017 19:24:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=PNasiNy6rFMiHmPQt47xEjbUmasBpA9TaOZ4PUtiLuQ=; b=ZEpp+kwv1W42/yuNEDJgCmxioWGBhH1QvcsZ6hn0I0srr5VXMXZgld36Ar6dlW8Xgz 28D+JaxSCgoNY6lZ46beNhWpLI+lc0/CM93YYBt1ZDK5ZRnQo78po9zamXLcLvH4YWbY +EKaFx9othbV9aA4N5DeqVIlLkt2o6UvwaDTR/3Qd1RA1w3H3giDYmj/FCThXeXMtXvn xfiyOhUL5xhvLhUX7stG2fJXDxnjG6HxewGIRykr5R8tti8HoPZv1tvFhQ1MTchLca9Y g7GykqWhh1ATEvq/phVmoI9m/o0YCkcScNFhaFisAjdqwZVMJjVeP0Eo7g9kNsTKVUbx 5VRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=PNasiNy6rFMiHmPQt47xEjbUmasBpA9TaOZ4PUtiLuQ=; b=IWumlebanWxxb7EjfY4pnz8Xb1IH++huoqkrTt/YZrMrpPnosEg095DLofo75X+fY9 71JcJ572AJU6KDWYwR+nXHi4eYg6pU7nwayQ51vO5P7NSSb36A8tsCxiR9Y3So1VXo32 8vWu+Bjr+YdDCT+xBf2s28kFRQijYeHIqOayaGv1Ym3lcujiJLVoMG/5cPJpsa5cKNi6 zeVHTDiUWReEbREbiLvDUhmjVFapa/csrWcs0RYX6vDx1PtniEaJcO8DWML72Jj7Ustb gJvEypdh5FZFl4xNV1bO1VZzvTiBYDPAjykpn5QqUzO1NiIIKER40WH/F+s4jF+D3BfO knMg== X-Gm-Message-State: AKGB3mLIs15gaueH3i2MjUeKg5bl5AO8HYMLOwnYZj7GsYtgh+GnpZeS IhOmbDtSo58EXjzPHlT2ka4= X-Received: by 10.84.129.193 with SMTP id b59mr5381286plb.361.1513740247105; Tue, 19 Dec 2017 19:24:07 -0800 (PST) Received: from aurora.jms.id.au ([45.124.203.15]) by smtp.gmail.com with ESMTPSA id t75sm3872443pgc.12.2017.12.19.19.23.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Dec 2017 19:24:05 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 20 Dec 2017 13:53:55 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH v3 02/20] dt-bindings: gpio: Add ASPEED constants Date: Wed, 20 Dec 2017 13:53:10 +1030 Message-Id: <20171220032328.30584-3-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org These are used to by the device tree to map pin numbers to constants required by the GPIO bindings. Signed-off-by: Joel Stanley -- v3: - Remove dtsi includes from this patch, they will come later --- include/dt-bindings/gpio/aspeed-gpio.h | 49 ++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 include/dt-bindings/gpio/aspeed-gpio.h -- 2.15.1 diff --git a/include/dt-bindings/gpio/aspeed-gpio.h b/include/dt-bindings/gpio/aspeed-gpio.h new file mode 100644 index 000000000000..56fc4889b2c4 --- /dev/null +++ b/include/dt-bindings/gpio/aspeed-gpio.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * This header provides constants for binding aspeed,*-gpio. + * + * The first cell in Aspeed's GPIO specifier is the GPIO ID. The macros below + * provide names for this. + * + * The second cell contains standard flag values specified in gpio.h. + */ + +#ifndef _DT_BINDINGS_GPIO_ASPEED_GPIO_H +#define _DT_BINDINGS_GPIO_ASPEED_GPIO_H + +#include + +#define ASPEED_GPIO_PORT_A 0 +#define ASPEED_GPIO_PORT_B 1 +#define ASPEED_GPIO_PORT_C 2 +#define ASPEED_GPIO_PORT_D 3 +#define ASPEED_GPIO_PORT_E 4 +#define ASPEED_GPIO_PORT_F 5 +#define ASPEED_GPIO_PORT_G 6 +#define ASPEED_GPIO_PORT_H 7 +#define ASPEED_GPIO_PORT_I 8 +#define ASPEED_GPIO_PORT_J 9 +#define ASPEED_GPIO_PORT_K 10 +#define ASPEED_GPIO_PORT_L 11 +#define ASPEED_GPIO_PORT_M 12 +#define ASPEED_GPIO_PORT_N 13 +#define ASPEED_GPIO_PORT_O 14 +#define ASPEED_GPIO_PORT_P 15 +#define ASPEED_GPIO_PORT_Q 16 +#define ASPEED_GPIO_PORT_R 17 +#define ASPEED_GPIO_PORT_S 18 +#define ASPEED_GPIO_PORT_T 19 +#define ASPEED_GPIO_PORT_U 20 +#define ASPEED_GPIO_PORT_V 21 +#define ASPEED_GPIO_PORT_W 22 +#define ASPEED_GPIO_PORT_X 23 +#define ASPEED_GPIO_PORT_Y 24 +#define ASPEED_GPIO_PORT_Z 25 +#define ASPEED_GPIO_PORT_AA 26 +#define ASPEED_GPIO_PORT_AB 27 +#define ASPEED_GPIO_PORT_AC 28 + +#define ASPEED_GPIO(port, offset) \ + ((ASPEED_GPIO_PORT_##port * 8) + offset) + +#endif From patchwork Wed Dec 20 03:23:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122429 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5023787qgn; Tue, 19 Dec 2017 19:24:49 -0800 (PST) X-Google-Smtp-Source: ACJfBoujhJ9SjuzrRGN6jJmx6xnQUD34oVYj1SBVxtrz+8H1zd2TCOfxBkb4/cS3O6KDC0BcO577 X-Received: by 10.159.241.20 with SMTP id q20mr5310018plr.225.1513740289589; Tue, 19 Dec 2017 19:24:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513740289; cv=none; d=google.com; s=arc-20160816; b=mkv10CC872zrKbMSMJmaaaMXXLkE1kxzoYZIWKNIYx8MVkJB2GlgRtDzg2CWlQ6dp5 gm2A7t44KVtdEQq5Sau3Hi0mrelvalbA6p5M3U1AUEDWOTELiR6xvRp0lYZFMnnC3+g/ deDTyDq8R9W4bZNbdwKJJRUIsR6PP8X2W0UueQqokHlTe3G2xiA8UNwLxk4biH8d9sHb DGs6pqE97a/Y/lrYkactKecfJ8qBuQ/I6fGMVodwQW9x3mJUCe/ZzPuFvo2us4AakcTK PRsgRdOc4ggSQ2M0zAVq6Hv7DNDo5vaeC4nyQ5niZXv8pduJK01UnYlth6/u/kIaD4sG Aqig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=L//p4+SmiOn2d2OcI+VSVaXahu85W/V/KRJOxytEDgY=; b=kzsaf0uZB+tnckYI8Asje7zgTLSQQVxChavLWQsu+RC1pWo2Ok1VuhMGihjhoiQpkm 51ZZdOHiGeS+oetMpKs1bHpDAwEYoNdDMOa0qmgFmHPU9pc2VKyKhg3/jWWMc2Ij7XDE z0NrgkOsS8YJDSW0n4KuosKpxmAlo2GVjUoYGo1kN8PcPXuN91QGeGC8ROfrB5V5BhR2 Ydju7LR/ISGK47cldx56XHxHcTGtp4FuRfUPCyATqurArRRel8431SKdx8Us7VwGYxXc kqT/3Y0QagTCLNGXqx+dWeRMDDF//EQ37mNIoD/+WaXuzUmlQE+lXNP9XCe2K5yONW3K 9Giw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=Mp7khUzN; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 19 Dec 2017 19:24:40 -0800 (PST) Received: from aurora.jms.id.au ([45.124.203.15]) by smtp.gmail.com with ESMTPSA id k130sm33805184pfc.100.2017.12.19.19.24.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Dec 2017 19:24:39 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 20 Dec 2017 13:54:29 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH v3 05/20] ARM: dts: aspeed: Add MAC clocks Date: Wed, 20 Dec 2017 13:53:13 +1030 Message-Id: <20171220032328.30584-6-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 2 ++ arch/arm/boot/dts/aspeed-g5.dtsi | 2 ++ 2 files changed, 4 insertions(+) -- 2.15.1 diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index b938759f799e..57194d804051 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -90,6 +90,7 @@ compatible = "aspeed,ast2400-mac", "faraday,ftgmac100"; reg = <0x1e660000 0x180>; interrupts = <2>; + clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; status = "disabled"; }; @@ -97,6 +98,7 @@ compatible = "aspeed,ast2400-mac", "faraday,ftgmac100"; reg = <0x1e680000 0x180>; interrupts = <3>; + clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 1af600b48475..b6faaef2b1a7 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -124,6 +124,7 @@ compatible = "aspeed,ast2500-mac", "faraday,ftgmac100"; reg = <0x1e660000 0x180>; interrupts = <2>; + clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; status = "disabled"; }; @@ -131,6 +132,7 @@ compatible = "aspeed,ast2500-mac", "faraday,ftgmac100"; reg = <0x1e680000 0x180>; interrupts = <3>; + clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; status = "disabled"; }; From patchwork Wed Dec 20 03:23:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122430 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5023961qgn; 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Tue, 19 Dec 2017 19:24:51 -0800 (PST) Received: from aurora.jms.id.au ([45.124.203.15]) by smtp.gmail.com with ESMTPSA id 68sm30851078pfx.186.2017.12.19.19.24.44 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Dec 2017 19:24:50 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 20 Dec 2017 13:54:40 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH v3 06/20] ARM: dts: aspeed: Add watchdog clocks Date: Wed, 20 Dec 2017 13:53:14 +1030 Message-Id: <20171220032328.30584-7-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 2 ++ arch/arm/boot/dts/aspeed-g5.dtsi | 3 +++ 2 files changed, 5 insertions(+) -- 2.15.1 diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 57194d804051..2b1bb31ce390 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -177,11 +177,13 @@ wdt1: watchdog@1e785000 { compatible = "aspeed,ast2400-wdt"; reg = <0x1e785000 0x1c>; + clocks = <&syscon ASPEED_CLK_APB>; }; wdt2: watchdog@1e785020 { compatible = "aspeed,ast2400-wdt"; reg = <0x1e785020 0x1c>; + clocks = <&syscon ASPEED_CLK_APB>; }; vuart: serial@1e787000 { diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index b6faaef2b1a7..95bb04e4cee2 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -219,16 +219,19 @@ wdt1: watchdog@1e785000 { compatible = "aspeed,ast2500-wdt"; reg = <0x1e785000 0x20>; + clocks = <&syscon ASPEED_CLK_APB>; }; wdt2: watchdog@1e785020 { compatible = "aspeed,ast2500-wdt"; reg = <0x1e785020 0x20>; + clocks = <&syscon ASPEED_CLK_APB>; }; wdt3: watchdog@1e785040 { compatible = "aspeed,ast2500-wdt"; reg = <0x1e785040 0x20>; + clocks = <&syscon ASPEED_CLK_APB>; status = "disabled"; }; From patchwork Wed Dec 20 03:23:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122431 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5024043qgn; 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Tue, 19 Dec 2017 19:25:02 -0800 (PST) Received: from aurora.jms.id.au ([45.124.203.15]) by smtp.gmail.com with ESMTPSA id r11sm28666891pgf.79.2017.12.19.19.24.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Dec 2017 19:25:01 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 20 Dec 2017 13:54:51 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH v3 07/20] ARM: dts: aspeed: Add flash controller clocks Date: Wed, 20 Dec 2017 13:53:15 +1030 Message-Id: <20171220032328.30584-8-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 2 ++ arch/arm/boot/dts/aspeed-g5.dtsi | 3 +++ 2 files changed, 5 insertions(+) -- 2.15.1 diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 2b1bb31ce390..36cb66d8cc10 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -55,6 +55,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2400-fmc"; + clocks = <&syscon ASPEED_CLK_AHB>; status = "disabled"; interrupts = <19>; flash@0 { @@ -70,6 +71,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2400-spi"; + clocks = <&syscon ASPEED_CLK_AHB>; status = "disabled"; flash@0 { reg = < 0 >; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 95bb04e4cee2..156b345ff20d 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -55,6 +55,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-fmc"; + clocks = <&syscon ASPEED_CLK_AHB>; status = "disabled"; interrupts = <19>; flash@0 { @@ -80,6 +81,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-spi"; + clocks = <&syscon ASPEED_CLK_AHB>; status = "disabled"; flash@0 { reg = < 0 >; @@ -99,6 +101,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-spi"; + clocks = <&syscon ASPEED_CLK_AHB>; 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[209.132.180.67]) by mx.google.com with ESMTP id d8si12366776pfg.317.2017.12.19.19.25.20; Tue, 19 Dec 2017 19:25:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=p3c3zw7J; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754391AbdLTDZR (ORCPT + 28 others); Tue, 19 Dec 2017 22:25:17 -0500 Received: from mail-pg0-f65.google.com ([74.125.83.65]:38737 "EHLO mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754054AbdLTDZN (ORCPT ); Tue, 19 Dec 2017 22:25:13 -0500 Received: by mail-pg0-f65.google.com with SMTP id f12so11417133pgo.5; Tue, 19 Dec 2017 19:25:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=0ZFUYq5pZmb21j6pXKGHhgo6SaUz1kdB8x6CPPX95Ts=; b=p3c3zw7JzpBjgYmgqoqdqoFMS3o/63L9hto3Bux/w4g4o8RFpGNfZX+sWincT8j6eN hqnojnJ4wtuxMc6f8L4vNCYhycSWJzBi1JkhxumMv1KAfRvSfqW9bNhXOSSWCqCosxUy cWYPRVzw5d+niqpZ8GUFOJi1XROZip2XcHg1//YhF6nibYqOu88+wEJ6/9gY9iy9obmg YSllUsKpWeZQ7/kxYfsyDZP3ggnDWBZvcB4Xfw6lfd/5XzVpZoIvqrSafejZ8DOVx8eW aOBU5lNbQ74/9Ke8OloC6Ia5en3cgZNJKKcyJfFiGfgLX+hBCRtKk4/lnEumDZGGgxnn D/lA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=0ZFUYq5pZmb21j6pXKGHhgo6SaUz1kdB8x6CPPX95Ts=; b=hufib/hU8H+Nw+Ke28FZj/MvI/2zMnQ72gTsVCZPExTPhuc4pfbmrq0bLaQR9RykLM 4yIrcibL3LsJJXDoC1mj3tVSob6JKyhbhCMcNg6qBUulwvsiE/0zRxZMa78vR09W5kIQ PziBxa+Fh1mtXXnLxdPorQL5FlaYwGNCZje2fzIEgmtjYpqG57zw0mSyI/V5xdREsTnJ JxmvZElSTtxBik9u4xBzWaQB2W7v6Flu9H2ohNGktl7bP2HUhOitbJW2Qu+xpU2HhX1H j2c7t+ZzCqoOFkXGSPZFYpjumeNN91XekGZYcBav7IOwW5zsw6fR/2xFHrpya9UvWaQj ev0A== X-Gm-Message-State: AKGB3mKEhxp0foQ7RCzetBQHjuvwR2+q3xoViCl+DJV8NBnbCPsThX3F eDZNWLcAdUcorwY1SfEvd0E= X-Received: by 10.98.92.194 with SMTP id q185mr5452109pfb.115.1513740313379; Tue, 19 Dec 2017 19:25:13 -0800 (PST) Received: from aurora.jms.id.au ([45.124.203.15]) by smtp.gmail.com with ESMTPSA id y5sm32998220pfd.63.2017.12.19.19.25.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Dec 2017 19:25:12 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 20 Dec 2017 13:55:03 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH v3 08/20] ARM: dts: aspeed: Add clock phandle to GPIO Date: Wed, 20 Dec 2017 13:53:16 +1030 Message-Id: <20171220032328.30584-9-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This enables a feature where the driver can debounce inputs. Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 1 + arch/arm/boot/dts/aspeed-g5.dtsi | 1 + 2 files changed, 2 insertions(+) -- 2.15.1 diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 36cb66d8cc10..d2a82850b05b 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -144,6 +144,7 @@ reg = <0x1e780000 0x1000>; interrupts = <20>; gpio-ranges = <&pinctrl 0 0 220>; + clocks = <&syscon ASPEED_CLK_APB>; interrupt-controller; }; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 156b345ff20d..3a25fa48d4f6 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -187,6 +187,7 @@ reg = <0x1e780000 0x1000>; interrupts = <20>; gpio-ranges = <&pinctrl 0 0 220>; + clocks = <&syscon ASPEED_CLK_APB>; interrupt-controller; }; From patchwork Wed Dec 20 03:23:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122434 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5024405qgn; Tue, 19 Dec 2017 19:25:36 -0800 (PST) X-Google-Smtp-Source: ACJfBou104xg4QxKQfUCw3PtQ7xTJPZlkIqmiM7b0yXqV0wHDVyNCnwFujYE/xAv3DPzlhgFTIB8 X-Received: by 10.84.138.131 with SMTP id 3mr5555223plp.304.1513740336656; Tue, 19 Dec 2017 19:25:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513740336; cv=none; d=google.com; s=arc-20160816; b=IlkHBKaJ5K7cGGrxU6Jq0tCejmjeeo6T1Dlt5ottpl3MqfS+jiSOc8uHUbFcq6rv5y E2D0cDq9nE3wJdO7+iDzEMMpqdkkH38eixYU82JKgHw38TTWVWZ3alNjPi28FS913EMa 0MlP0iS9rmhMqLTDD4sJgA8b2U6omloEZD9vEzUIuwCNdReT/u4m0AfXS9C0wdwdT5jj xuXhLpcjGNpNc8yUR9uLGe1t/Yp8zGojwPoLvhxmfsfQtV3GvpMNHEEI68bZrZb7haBT 4Hxp9l/3ek4wRAMXpJ0zLyj+BsktpTQrPBZ/e06KoVqAMHHkJtcbr4YF+B5Wt0txf5qD VCbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=T39S1Ar1TwglZBytu3/pBFeBMUB5Uc/SAIyDnYFETBk=; b=LbyItLsjYUfbNvlhkOPdrL4GbApaVAX9TsOWfLsjW4tKglUkHlI42YH06dYfLptKxD dRCRe6sH1ifjY3nK9TTXNkZA8OweY+SaPWf4IdbE+EjM6nsHaF1DSbmDB20C2rIL4f+h suQZh+2ua7DvxKarLxPMXlfLLAxsGSliTinYde8AUjgeKXLNzTjR3emivIV6pcN37hiI WCrdbjp3fOqfjOyaV0gq7y9GtluJDrqMCqyAtpNMVR7W+OSNdIiBuXDcJ4yzyuyllvc6 4VVYybLvZHxieVrLHTI2TOFXo12H/uoLXYSk80n7lYcPWaePBRlU6DTdpLLVqfSLA07K 9KvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=QzqfGiyP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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It needs both in order to function correctly. Signed-off-by: Joel Stanley -- v3: Add the pwm reset phandle --- arch/arm/boot/dts/aspeed-g4.dtsi | 10 ++++++++++ arch/arm/boot/dts/aspeed-g5.dtsi | 10 ++++++++++ 2 files changed, 20 insertions(+) -- 2.15.1 diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index d2a82850b05b..91aea96c10c8 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -189,6 +189,16 @@ clocks = <&syscon ASPEED_CLK_APB>; }; + pwm_tacho: pwm-tacho-controller@1e786000 { + compatible = "aspeed,ast2400-pwm-tacho"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1e786000 0x1000>; + clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_PWM>; + status = "disabled"; + }; + vuart: serial@1e787000 { compatible = "aspeed,ast2400-vuart"; reg = <0x1e787000 0x40>; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 3a25fa48d4f6..af3869ec87bb 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -239,6 +239,16 @@ status = "disabled"; }; + pwm_tacho: pwm-tacho-controller@1e786000 { + compatible = "aspeed,ast2500-pwm-tacho"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1e786000 0x1000>; + clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_PWM>; + status = "disabled"; + }; + vuart: serial@1e787000 { compatible = "aspeed,ast2500-vuart"; reg = <0x1e787000 0x40>; From patchwork Wed Dec 20 03:23:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122435 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5024485qgn; Tue, 19 Dec 2017 19:25:42 -0800 (PST) X-Google-Smtp-Source: ACJfBosn2kkjCbjxqQsJutPVV4li4763RR0Oy19SEUXQLLF5UC8aOaGe/rS8Lerc95yQt3/STH1G X-Received: by 10.84.135.162 with SMTP id 31mr5412067plj.23.1513740342308; Tue, 19 Dec 2017 19:25:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513740342; cv=none; d=google.com; s=arc-20160816; b=cZhEi7AZD6Oa9jNMPKWFqvZC3dH226wO4nBPOsPascVxfmG0rGOAvghbtwm9a7uup7 Qn5oRTv+XXthkZI1LflJv6kFMjWZ5Og/MNhCFUjSrdNUfdLa72WrXf96/Lip2QUXLYjh RNpk/PEuhUfwVThY1EFbVb7Mod/tKyVX2gfDhAVk0Zm7/o01AkyM1kmeduVhStBugle+ 1EvWihS7APV81a/oG94iy5AFWnGIKpqtAaDdQS9eM0wcE/w22k+rmy+DICUXL0ilbNiU aJs5MupuXjUURRkGrB5IWaXGPwwWoTR7DDD8ZFZDEc+83QwvdYXiVM1bb1gcTrDv7ra8 LuQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=KSGf9q8QqASXTCWKP3eWxI2Urx5RRRzsJyAn9DNLHB4=; b=oStS3cEJcD7h5uH2uMDJ6h8auZ1WG6adky+Am87fQXA81Ca0SUzdRQni45ZsFXs0lb 9LiCSAfTlKI0lWXM05E77sVxoum6Fw7gAomptJIq7XOEBfVdKD8ctdXx2DELAOMHAV00 LIIDEAZBZmR1SNPpTjDiLKH5FNeKFRguVRPUWe1gZNqQ8z9rZH1LpNCyVt4WUklBvZPZ q2zkw7gHkRU1CGnbjmpXUl4KoSR4ba/M5I72W/q6fLRH9VSmfVZDGwuzK++h+zXB4SWq /LWYO42cRlmWdOkNtWvDbF0anbWiLa6C7aoMwy/xCQqVyAyA7Xtu6WM2a0mdzJk1d2Ux zzRw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=ul7l4suJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 7 +++++++ arch/arm/boot/dts/aspeed-g5.dtsi | 6 ++++++ 2 files changed, 13 insertions(+) -- 2.15.1 diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 91aea96c10c8..e8a61fc3956d 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -237,6 +237,13 @@ status = "disabled"; }; + lpc_snoop: lpc-snoop@0 { + compatible = "aspeed,ast2400-lpc-snoop"; + reg = <0x0 0x80>; + interrupts = <8>; + status = "disabled"; + }; + lhc: lhc@20 { compatible = "aspeed,ast2400-lhc"; reg = <0x20 0x24 0x48 0x8>; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index af3869ec87bb..d558091aa92b 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -288,6 +288,12 @@ status = "disabled"; }; + lpc_snoop: lpc-snoop@0 { + compatible = "aspeed,ast2500-lpc-snoop"; + reg = <0x0 0x80>; + interrupts = <8>; + status = "disabled"; + }; lhc: lhc@20 { compatible = "aspeed,ast2500-lhc"; From patchwork Wed Dec 20 03:23:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122436 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5024630qgn; Tue, 19 Dec 2017 19:25:54 -0800 (PST) X-Google-Smtp-Source: ACJfBos2nsYPYqPW9wlk2EpnlVcLLOP7OS1iCOUWw7UuiUtKCWnJx42um/jHWvKnzY1sit+QMfgi X-Received: by 10.101.82.4 with SMTP id o4mr539443pgp.425.1513740354084; Tue, 19 Dec 2017 19:25:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513740354; cv=none; d=google.com; s=arc-20160816; b=ktJQUi7hi85Jpl9/CzSzZNpfm/KaHdvQKRvrhzhBZMEpB/dXkNgX7VvPG4pXUAd/v6 c7hRFosyZphlKzKuFywWX/iiofRxQirAvoFNpkQcBxa4vKJLJWbSzfe0IDPj0YeZYz+E 8wbxWm9/LL7J6tYIA+2e8LBozDsYU0hwx+SPvTSz8BiWB62r/HDe3+2QTFxHTl8G7c2u MGWCvDcyWoFgKFYxWpDebTvLIkSXmA0i4iZa69LTQfK8NnOIF5rqumotwjCgtSKJmcT7 sybti0aYJA6vRn8frQ+NGwq8kEXR2d8ZLfo3nRYPlaKJyWfYgnZ/R9WFts/hAMrF2f3v Qjrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=k3fP+7Cai1Sdtxn5N2hx1fGLkJ6GnOLEQRPbqMt9x6w=; b=CNJ+6D4PAJSDyMlqeJn/OCOmeAa0EwEjQVLAkT4L2jFlqfMQ1G5D+2jZXsRL1Ei7VH DK8NOeHBqWQU5Vgit3ZTtuuieGDoIE90byp+f6NxbzqBcoJDdmaktA26GYeQmDOkbAvA kTifh+XMrm7/+z/EkELOa1CYEG5UBSN1s7bnr3H8EZK5V6hXT0VDGns86iNa7igEJRGy BbcOACCczrinEJ4gI4ajVmIEdWFskDUV8WerrYU1i0VdchMnpV4/PFdRMirU8xIWvVDq 87YQoLyznmJx0ON/58ZnCVVzKWRtYaM0KK/0kjhuKL70hFXQr2DHUOAJj0+wzNVPoMFn CUhA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=UaBxGNEG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 1 - arch/arm/boot/dts/aspeed-g5.dtsi | 1 - 2 files changed, 2 deletions(-) -- 2.15.1 diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index e8a61fc3956d..1186fe55e2d8 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -1,5 +1,4 @@ // SPDX-License-Identifier: GPL-2.0 -#include "skeleton.dtsi" #include / { diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index d558091aa92b..6043876ad85f 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -1,5 +1,4 @@ // SPDX-License-Identifier: GPL-2.0 -#include "skeleton.dtsi" #include / { From patchwork Wed Dec 20 03:23:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122437 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5024819qgn; Tue, 19 Dec 2017 19:26:06 -0800 (PST) X-Google-Smtp-Source: ACJfBovamgNL15yoOCWVOG94QP4vZ7uP5vrOTJe4ovLr7cmFbkoLtmbyN9+tdzPZAKsINVrcaGiB X-Received: by 10.101.81.73 with SMTP id g9mr4985201pgq.137.1513740366428; Tue, 19 Dec 2017 19:26:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513740366; cv=none; d=google.com; s=arc-20160816; b=sLXvR+QNg1XGVYAYIHgROzhzfx7ik0XYTy8DvTSqhkYhYwm2Ilt5FZLrAmd9Ibxt4T cb4Q0fno39ilzhwmMpnEDNi+6qc2fbWAw2zGJpelgzKMF+bngGa/PuHkvT4PLdApoa70 QfOQA2QYwomt95h696J1NIGrJ4bKlz1xiwSw5LGOjooNgk998Mhy3gYGrzhCXkMntBZL kIBxDacjIOpd6owq4C8SeL2qPUa+aCTR7WOjLtR6fT5Dxa/hWWxWVMrVqD+wdDm0jbPb 5qqXgSulKFRPPApJsv5biVRGm01vRGmg8efPeRCEo/T1Rd3O/yTVC1CbJO24gOIgOb9p 5hZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=UVDx5gxktlRQcbABWE583V40kjzdSIEX4Xg4hOt4TF4=; b=sAK0vuhvDty9UNPCcRcDHETW95VabiSZoYXfmiC4ZFDDQ7tObLzpoEF3zYuhqjqw/U 0B7bXDPfYgXr2KrAyMdDN2kgqXdM0wZXG7K0c3Q9FnGcFkR0Lynw3nD2A/9680vLGVPF S/BQhHJxgKLbJ0gH5SdZ5R00Dfos3TBO1iTIaTcFdcK2YwGXkvuUxHteIGtPtWPL3sDh Nhp8NJf+0XkM2JT4xtMYOiSym5hN/XfQ/IRgr8XqWYc6kYsTqRT1vwbgRIlHwCECwyzF 2eaYrP3uqgr/ePnKUPK4WcGJglch2nCPUYQvWAKaIYS+lM9cKD0gDuo8XQ9MBdUzVWa0 GAgg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=gdGMHp93; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Update them to be GPL 2.0+ in line with other IBM kernel contributions. Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-ast2500-evb.dts | 2 +- arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 2 +- arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 2 +- arch/arm/boot/dts/aspeed-g4.dtsi | 2 +- arch/arm/boot/dts/aspeed-g5.dtsi | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) -- 2.15.1 diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts index 602bc10fdaf4..3e6f38e5d5d0 100644 --- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts +++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ /dts-v1/; #include "aspeed-g5.dtsi" diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts index c786bc2f2919..a8f0c046e83e 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ /dts-v1/; #include "aspeed-g4.dtsi" diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts index 8067793129ea..a7a9386f964d 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ /dts-v1/; #include "aspeed-g5.dtsi" diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 1186fe55e2d8..b0d8431a3700 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ #include / { diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 6043876ad85f..40de3b66c33f 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ #include / { From patchwork Wed Dec 20 03:23:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122438 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5024930qgn; Tue, 19 Dec 2017 19:26:17 -0800 (PST) X-Google-Smtp-Source: ACJfBoundIi8SMijfycXJOi6aQvYUeyv5pirPrRqEUNFxs3ui2l1OBZdMCy15EXXVkFptoVtolDz X-Received: by 10.99.108.66 with SMTP id h63mr4993402pgc.362.1513740377665; Tue, 19 Dec 2017 19:26:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513740377; cv=none; d=google.com; s=arc-20160816; b=MuCFEZTLZsz17beyNdVFRZ1ra1x8Q3/6cj9NeGEoRG5coRrD9wqCbXie5Q2ySQVgow W9ptI5yOgEaiL/VcTZTU7KsNovyXAFaBRgydrriSqalB1luydeiJSKutRTyJ2GtzYAHX 4Qhse6Q01IHey6MX4g+vxJuPuBFTnHPgWHWx0R1q2LHj83dpKXuTw5MHEFVOG5OAf4wP VWFF/fOJHDQVM9Q0vDtVOZNDA18rJVHetwVYSGpGQk7WsMnaQqMeNnZUps3Tr+sjlugv FMbPX4sODNIBzLNwDGKuQG8pAXM4aOtoHv2wR/Ez4lxaUop0Vj3LYkHdcbCrtmIPw/36 eyeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=3Csls6gVT1AthJx/dJ4iMAFvsBps+6tOZGXf5bUPr1s=; b=NODWItjyqAZjuhbA7Bsw6SR9KsGMU4SuOY9lv1Dm4R0tu/36rr+47nCLsmdDT+eOby pWj9rdBRjpDapgqcFFKxECYesBUfPZjDUKOfE0sxPgWDQGFYuVevvhBDa2ny5eBZOEn3 ihDt4MFrzInKvZrMYMTRSEP/Wb0TtlhkytIxUX+X/TmsI4R0c/edVJL28T1qNybtzSVX YWmLRMiHOxPj4oQkjepaJIYfHEB/9JRVIrdyUlUPdlEdXmI6HJmkJLWAFWr5+Hxe+U38 HC3qFFGp1oojvMbfaIIxz9bV/3ne9aYozLP2FRsYTXodbywYLys4fypHQWTjvPFALSxG DIdg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=JRiYcsF5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l7si11145405pgq.631.2017.12.19.19.26.17; Tue, 19 Dec 2017 19:26:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=JRiYcsF5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754499AbdLTD0N (ORCPT + 28 others); Tue, 19 Dec 2017 22:26:13 -0500 Received: from mail-pl0-f68.google.com ([209.85.160.68]:39140 "EHLO mail-pl0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754139AbdLTD0J (ORCPT ); Tue, 19 Dec 2017 22:26:09 -0500 Received: by mail-pl0-f68.google.com with SMTP id bi12so8250863plb.6; Tue, 19 Dec 2017 19:26:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3Csls6gVT1AthJx/dJ4iMAFvsBps+6tOZGXf5bUPr1s=; b=JRiYcsF5TpWVtbbAQ5lJy3yb1JdzOGfY/qQyMr4rljyBhggLEKSnXlhY4CQXfiDDJL lcieUenQQ7G7BI5bVlVlwm7bvbD7tYO4uKhpK0xVhusqoY+EPfpR9p+LfnXKjRM39oLx cKKqevqn7CNTkuH8ZgN2A5jSVnWhckPZ/GXmcpGIoBihnsXRFHkYqOSpLpshrHX6KxBJ KyBObYS2C3xJlOQ1N9+cB9HblR5xrZCqwMjA56+jPBl7Q0bFK2dL5dd+IE3OEAWS+8mT cEsnw8Bq60F1B521gDcHJbWUI5bONp8GTqFXgEr3M3bINlJsfQYoQZU4vwscZJvGjSOm gv8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=3Csls6gVT1AthJx/dJ4iMAFvsBps+6tOZGXf5bUPr1s=; b=rhQ3iOL4clQ+jLPFwvYFEbAkt0MCI8qsHjodPk3THJ15obpnpCrGBEr0nqDvReKK3r Y+myQAvuFVf4SQPxsQo9jjYhQwvB//qMjK0dNkxMoYahgC8dZM3cvjgHqBe1IggplaOz Y88tzpSyaZVwwjmA+gdWtcUzsSLGRO05KYW2rZ4lz3NUJ20I7UliOx5SDZvMM9ezFnmF HjIPEUUdDUudhGvlOdnaCYTHAbr1Im5byPqb2zJTpS+6rddTjmJMOiEqjCpt70nJ+ojw dh1NmiyO8F7ZCafkICiFmzS9EEZb+FN+vxFjHPJXIPiknNMJ6N74YtIfyu8bP3l2V+2L uB7Q== X-Gm-Message-State: AKGB3mLe7f2e+xmnVYhcLppw4vd1EBPCPQPloyF0apOLaZ3OYppIf87X nvRcxcyDsZlCvPLPzDrNZqc= X-Received: by 10.159.207.138 with SMTP id z10mr5420515plo.35.1513740369059; Tue, 19 Dec 2017 19:26:09 -0800 (PST) Received: from aurora.jms.id.au ([45.124.203.15]) by smtp.gmail.com with ESMTPSA id l80sm32999332pfb.124.2017.12.19.19.26.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Dec 2017 19:26:07 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 20 Dec 2017 13:55:58 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH v3 13/20] ARM: dts: Add OpenBMC flash layout Date: Wed, 20 Dec 2017 13:53:21 +1030 Message-Id: <20171220032328.30584-14-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is a layout used by OpenBMC systems. It describes the fixed flash layout of a 32MB mtd device. Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- v3: - Remove leading zeros to fix warning --- arch/arm/boot/dts/openbmc-flash-layout.dtsi | 32 +++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 arch/arm/boot/dts/openbmc-flash-layout.dtsi -- 2.15.1 diff --git a/arch/arm/boot/dts/openbmc-flash-layout.dtsi b/arch/arm/boot/dts/openbmc-flash-layout.dtsi new file mode 100644 index 000000000000..6c26524e93e1 --- /dev/null +++ b/arch/arm/boot/dts/openbmc-flash-layout.dtsi @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ + +partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + u-boot@0 { + reg = <0x0 0x60000>; + label = "u-boot"; + }; + + u-boot-env@60000 { + reg = <0x60000 0x20000>; + label = "u-boot-env"; + }; + + kernel@80000 { + reg = <0x80000 0x440000>; + label = "kernel"; + }; + + rofs@c0000 { + reg = <0x4c0000 0x1740000>; + label = "rofs"; + }; + + rwfs@1c00000 { + reg = <0x1c00000 0x400000>; + label = "rwfs"; + }; +}; From patchwork Wed Dec 20 03:23:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122439 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5025195qgn; Tue, 19 Dec 2017 19:26:37 -0800 (PST) X-Google-Smtp-Source: ACJfBov/d+GYc8Pfy4I2EdC0f1RJX4xfwFuFAVlyzqqhtNcGTDJuueynTc4tAuRN1z8mt4Fzv027 X-Received: by 10.84.248.132 with SMTP id q4mr5560668pll.121.1513740397071; Tue, 19 Dec 2017 19:26:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513740397; cv=none; d=google.com; s=arc-20160816; b=hZZ7EiBixzVGBXSyIcpaugvTujE5JYG9isU9tKKOsYMKZIe46NvR+0rvQDbLGcxVkV 984O8rqAR+6gB3WBvgj8t+FPKuvraEE61JblPvjIlDHkCkWiWdXRyY1DCDbL3tYz0yPV aOXzoz13llOt5bs6HyeHuQ9kfKL9LGCOj1DimNI/ras0lhb28UXMET+5y9Md8kQy0SgN VcMUJ1FSHXUEV9ZpmFg6DhHRiJr/m/F9u/e+asqd5aesQV5SxPpK/FWoim/4jRQplQRT UXDq4Hh9JMlbI/7SoAbG48e4p96iXbZO6UpTKmSiryUu9IwYiNRW71BmwhYgX1Ijl5P6 xOhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=f/xcksnVlbOcSJ1nprZu6CFCN8MjcJTbkpmBLcl+KCA=; b=q3nS9PAnwC/OY1sbwJY8+Ge9bSH3PLcmwLoPzjc7CciLNZ6beYkLn8BrIR1iomUksl wlDqXHzG5d0jAcG5fmdJwAVPIXg17lbqojZsDGAohBYx2KbFFKR3VO3QWF9T5g5OEKHw EX1bOsW4H0pK5ziH3hcZSlPrCoDy2zbVd9o+RDbrnUiwfp6g1c3+LaZLfs+YW8qd4l8z VfOaLmDChRtqxs3jouHB+Fe/onpgQrN3p7Lvx3t3bvD3FvxItt7weeZ/x8o0cBEP9JXf DEupmJlJPagip9hNrhMZOpfXWxGe18X+k33PlJr2ex+7uSdfJMF+WHiPUIKCDGWpa7yJ /aLA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=jCFKFIgN; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- arch/arm/boot/dts/Makefile | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) -- 2.15.1 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d0381e9caf21..5d1e9d37bf3a 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1101,7 +1101,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt8127-moose.dtb \ mt8135-evbp1.dtb dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb -dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp-palmetto.dtb \ - aspeed-bmc-opp-romulus.dtb \ - aspeed-ast2500-evb.dtb +dtb-$(CONFIG_ARCH_ASPEED) += \ + aspeed-ast2500-evb.dtb \ + aspeed-bmc-opp-palmetto.dtb \ + aspeed-bmc-opp-romulus.dtb endif From patchwork Wed Dec 20 03:23:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122440 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5025263qgn; Tue, 19 Dec 2017 19:26:43 -0800 (PST) X-Google-Smtp-Source: ACJfBot/UpvxKS1i2CM4fjeBai03Ii9+eBEDQPB2D1VATNqL5zDbcPZXl/Hnm481Ac8QoLoBB0o9 X-Received: by 10.84.230.137 with SMTP id e9mr5191777plk.293.1513740403287; Tue, 19 Dec 2017 19:26:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513740403; cv=none; d=google.com; s=arc-20160816; b=jOpbns5/qxTZP7UJwwu7qIXpwoCOnIRgAFQwtKOrLMMm28jthl0DXQ7ofExY/ho1U7 1FLpiwakvt9sr9YE9ZKktHuckR62Uj6m2RMtZhZWm1aRpKaG0Vfr0WCB95J2Mb6BkFg6 SYVorj6WDe5kjhpX722sxzL0kQx1/jQj2ostLyk2uz78z4WN8bcJLVN2dBoq4j7yRBhC KO/U/MYa4lWEnJ5CfRBizh/z6zxHOoLkCYwPog3OUOVI2amUNPfhz2JUUxxozGWgEHDW +Z7rxTnEDq5DVo9erdZSeUIgRCbRQwt/M+n6unsix0xAvBxdRQE7jGuAqxdhIZPhGWFn IMVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=2FSPIDR08X1b7MZwg74XuMv4N2G3FND5INLBTA0R844=; b=PaJapMB1Sm9CnnV0ns22fmKvKh9Y7mbVFzRQwDpgFN66Kir1eb9uw/k3aYxHNU3+2g Rc/f6P7WWsRFN8OnGQlUQrs72BhxWUGgvMC64wF0nOh7kMQw+5MAB+Gnrpst4zBhnX8h 8NeQIpdqYQ3qGHTpqLXh0eO8Bk7ouCf8A5PsSIxCgUWQHchbE0DoRJo4NgXOSSQdHi4S HK6KiN8T5NSuxbiyjAleiAEyddFl0brnsYah66/FZeHAHOjI8jhMaCQTNQB+ODXQI7vn atduFC2sLafYUBtiCB/yc5w6uk2X5UyGvpQOGlMgmRFEfz8rpFE9SkDyXY2Xz+St3Rml Lgsw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=krVoYLJY; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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James" Subject: [PATCH v3 15/20] ARM: dts: aspeed: Add Witherspoon BMC machine Date: Wed, 20 Dec 2017 13:53:23 +1030 Message-Id: <20171220032328.30584-16-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Witherspoon BMC is an ASPEED ast2500 based BMC that is part of an OpenPower Power9 server. This adds the device tree description for most upstream components. It is a squashed commit from the OpenBMC kernel tree. Signed-off-by: Brandon Wyman Signed-off-by: Matt Spinler Signed-off-by: Brad Bishop Signed-off-by: Edward A. James Signed-off-by: Cédric Le Goater Signed-off-by: Andrew Jeffery Reviewed-by: Brandon Wyman Signed-off-by: Joel Stanley --- v2: - Add Brandon's reviewed-by tag v3: - Add GPIO include - Add unit name for memory node to fix warning --- arch/arm/boot/dts/Makefile | 4 +- arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 548 +++++++++++++++++++++++ 2 files changed, 551 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts -- 2.15.1 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5d1e9d37bf3a..15a9207319c1 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1104,5 +1104,7 @@ dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-ast2500-evb.dtb \ aspeed-bmc-opp-palmetto.dtb \ - aspeed-bmc-opp-romulus.dtb + aspeed-bmc-opp-romulus.dtb \ + aspeed-bmc-opp-witherspoon.dtb + endif diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts new file mode 100644 index 000000000000..5f9049d2c4c3 --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts @@ -0,0 +1,548 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; +#include "aspeed-g5.dtsi" +#include +#include + +/ { + model = "Witherspoon BMC"; + compatible = "ibm,witherspoon-bmc", "aspeed,ast2500"; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200 earlyprintk"; + }; + + memory@80000000 { + reg = <0x80000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + flash_memory: region@98000000 { + no-map; + reg = <0x98000000 0x04000000>; /* 64M */ + }; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <1000>; + + fan0-presence { + label = "fan0-presence"; + gpios = <&pca0 4 GPIO_ACTIVE_LOW>; + linux,code = <4>; + }; + + fan1-presence { + label = "fan1-presence"; + gpios = <&pca0 5 GPIO_ACTIVE_LOW>; + linux,code = <5>; + }; + + fan2-presence { + label = "fan2-presence"; + gpios = <&pca0 6 GPIO_ACTIVE_LOW>; + linux,code = <6>; + }; + + fan3-presence { + label = "fan3-presence"; + gpios = <&pca0 7 GPIO_ACTIVE_LOW>; + linux,code = <7>; + }; + }; + + leds { + compatible = "gpio-leds"; + + fan0 { + retain-state-shutdown; + default-state = "keep"; + gpios = <&pca0 0 GPIO_ACTIVE_LOW>; + }; + + fan1 { + retain-state-shutdown; + default-state = "keep"; + gpios = <&pca0 1 GPIO_ACTIVE_LOW>; + }; + + fan2 { + retain-state-shutdown; + default-state = "keep"; + gpios = <&pca0 2 GPIO_ACTIVE_LOW>; + }; + + fan3 { + retain-state-shutdown; + default-state = "keep"; + gpios = <&pca0 3 GPIO_ACTIVE_LOW>; + }; + + front-fault { + retain-state-shutdown; + default-state = "keep"; + gpios = <&pca0 13 GPIO_ACTIVE_LOW>; + }; + + front-power { + retain-state-shutdown; + default-state = "keep"; + gpios = <&pca0 14 GPIO_ACTIVE_LOW>; + }; + + front-id { + retain-state-shutdown; + default-state = "keep"; + gpios = <&pca0 15 GPIO_ACTIVE_LOW>; + }; + + rear-fault { + gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>; + }; + + rear-id { + gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>; + }; + + rear-power { + gpios = <&gpio ASPEED_GPIO(N, 3) GPIO_ACTIVE_LOW>; + }; + + power-button { + gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>; + }; + }; + + fsi: gpio-fsi { + compatible = "fsi-master-gpio", "fsi-master"; + #address-cells = <2>; + #size-cells = <0>; + + clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; + data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>; + mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; + trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>; + }; + + iio-hwmon-dps310 { + compatible = "iio-hwmon"; + io-channels = <&dps 0>; + }; + + iio-hwmon-bmp280 { + compatible = "iio-hwmon"; + io-channels = <&bmp 1>; + }; + +}; + +&fmc { + status = "okay"; + + flash@0 { + status = "okay"; + label = "bmc"; + m25p,fast-read; +#include "openbmc-flash-layout.dtsi" + }; + + flash@1 { + status = "okay"; + label = "alt"; + m25p,fast-read; + }; +}; + +&spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default>; + + flash@0 { + status = "okay"; + label = "pnor"; + m25p,fast-read; + }; +}; + +&uart1 { + /* Rear RS-232 connector */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_txd1_default + &pinctrl_rxd1_default + &pinctrl_nrts1_default + &pinctrl_ndtr1_default + &pinctrl_ndsr1_default + &pinctrl_ncts1_default + &pinctrl_ndcd1_default + &pinctrl_nri1_default>; +}; + +&uart2 { + /* APSS */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; +}; + +&uart5 { + status = "okay"; +}; + +&lpc_ctrl { + status = "okay"; + memory-region = <&flash_memory>; + flash = <&spi1>; +}; + +&mac0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii1_default>; + use-ncsi; +}; + +&i2c2 { + status = "okay"; + + /* MUX -> + * Samtec 1 + * Samtec 2 + */ +}; + +&i2c3 { + status = "okay"; + + bmp: bmp280@77 { + compatible = "bosch,bmp280"; + reg = <0x77>; + #io-channel-cells = <1>; + }; + + max31785@52 { + compatible = "maxim,max31785a"; + reg = <0x52>; + #address-cells = <1>; + #size-cells = <0>; + }; + + dps: dps310@76 { + compatible = "infineon,dps310"; + reg = <0x76>; + #io-channel-cells = <0>; + }; + + pca0: pca9552@60 { + compatible = "nxp,pca9552"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + gpio@0 { + reg = <0>; + type = ; + }; + + gpio@1 { + reg = <1>; + type = ; + }; + + gpio@2 { + reg = <2>; + type = ; + }; + + gpio@3 { + reg = <3>; + type = ; + }; + + gpio@4 { + reg = <4>; + type = ; + }; + + gpio@5 { + reg = <5>; + type = ; + }; + + gpio@6 { + reg = <6>; + type = ; + }; + + gpio@7 { + reg = <7>; + type = ; + }; + + gpio@8 { + reg = <8>; + type = ; + }; + + gpio@9 { + reg = <9>; + type = ; + }; + + gpio@10 { + reg = <10>; + type = ; + }; + + gpio@11 { + reg = <11>; + type = ; + }; + + gpio@12 { + reg = <12>; + type = ; + }; + + gpio@13 { + reg = <13>; + type = ; + }; + + gpio@14 { + reg = <14>; + type = ; + }; + + gpio@15 { + reg = <15>; + type = ; + }; + }; + + power-supply@68 { + compatible = "ibm,cffps1"; + reg = <0x68>; + }; + + power-supply@69 { + compatible = "ibm,cffps1"; + reg = <0x69>; + }; +}; + +&i2c4 { + status = "okay"; + + tmp423a@4c { + compatible = "ti,tmp423"; + reg = <0x4c>; + }; + + ir35221@70 { + compatible = "infineon,ir35221"; + reg = <0x70>; + }; + + ir35221@71 { + compatible = "infineon,ir35221"; + reg = <0x71>; + }; +}; + + +&i2c5 { + status = "okay"; + + tmp423a@4c { + compatible = "ti,tmp423"; + reg = <0x4c>; + }; + + ir35221@70 { + compatible = "infineon,ir35221"; + reg = <0x70>; + }; + + ir35221@71 { + compatible = "infineon,ir35221"; + reg = <0x71>; + }; +}; + +&i2c9 { + status = "okay"; + + tmp275@4a { + compatible = "ti,tmp275"; + reg = <0x4a>; + }; +}; + +&i2c10 { + /* MUX + * -> PCIe Slot 3 + * -> PCIe Slot 4 + */ + status = "okay"; +}; + +&i2c11 { + status = "okay"; + + pca9552: pca9552@60 { + compatible = "nxp,pca9552"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N", + "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF", + "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF", + "GPU4_TH_OVERT_N_BUFF", "GPU5_TH_OVERT_N_BUFF", + "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF", + "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF", + "GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF", + "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N"; + + gpio@0 { + reg = <0>; + type = ; + }; + + gpio@1 { + reg = <1>; + type = ; + }; + + gpio@2 { + reg = <2>; + type = ; + }; + + gpio@3 { + reg = <3>; + type = ; + }; + + gpio@4 { + reg = <4>; + type = ; + }; + + gpio@5 { + reg = <5>; + type = ; + }; + + gpio@6 { + reg = <6>; + type = ; + }; + + gpio@7 { + reg = <7>; + type = ; + }; + + gpio@8 { + reg = <8>; + type = ; + }; + + gpio@9 { + reg = <9>; + type = ; + }; + + gpio@10 { + reg = <10>; + type = ; + }; + + gpio@11 { + reg = <11>; + type = ; + }; + + gpio@12 { + reg = <12>; + type = ; + }; + + gpio@13 { + reg = <13>; + type = ; + }; + + gpio@14 { + reg = <14>; + type = ; + }; + + gpio@15 { + reg = <15>; + type = ; + }; + }; + + rtc@32 { + compatible = "epson,rx8900"; + reg = <0x32>; + }; + + eeprom@51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + + ucd90160@64 { + compatible = "ti,ucd90160"; + reg = <0x64>; + }; +}; + +&i2c12 { + status = "okay"; +}; + +&i2c13 { + status = "okay"; +}; + +&vuart { + status = "okay"; +}; + +&gfx { + status = "okay"; +}; + +&pinctrl { + aspeed,external-nodes = <&gfx &lhc>; +}; + +&wdt1 { + aspeed,reset-type = "none"; + aspeed,external-signal; + aspeed,ext-push-pull; + aspeed,ext-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdtrst1_default>; +}; From patchwork Wed Dec 20 03:23:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122441 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5025417qgn; Tue, 19 Dec 2017 19:26:55 -0800 (PST) X-Google-Smtp-Source: ACJfBos21SxsTWJsHEAxPlmeENVh1VET1eNjLxCA2KXpvBhDRAcv8MeWbeKSt7SdNQCxg/6BwpJu X-Received: by 10.101.77.9 with SMTP id i9mr4933932pgt.39.1513740415263; Tue, 19 Dec 2017 19:26:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513740415; cv=none; d=google.com; s=arc-20160816; b=BvirBFSn01I++uCTVI0D3mvd0cI9bmiSH/wN2G1Z6NNo1miB5auteCX/r6iQkiz1L9 LV7ECJqJleouwyxqQGoZK2K5WZ7pidMKGjJq/OwOqJmEwc5UTTtn2QXTaoeBGtA7pBF1 nYSGvD8Cds2j76FtTSSxs724NPj/Xx0yvav7zoJdZwpwvDfrgWMqz5qskR+KzHGiMWg8 vLu5gNi+0PcfxTTeqWZPtkNOiRneHkcIZlqfQfKDC1oyA/pqv6SwKqziYAoiEq/cccHL QaGCmYxgyzGk8F4grrNw2ZSH9RWWFCIX6F1D+6RPyxDUPZBYVZlGRAotOG9HxsJvkHyh 1MiA== ARC-Message-Signature: i=1; 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This adds basic DTS support for its AST2500 BMC. This adds the device tree description for most upstream components. It is a squashed commit of all of the patches from the OpenBMC kernel tree. Signed-off-by: Xo Wang Signed-off-by: Patrick Venture Signed-off-by: Robert Lippert Signed-off-by: Peter Hanson Signed-off-by: Jeremy Kerr Signed-off-by: Cédric Le Goater Signed-off-by: Rick Altherr Signed-off-by: Joel Stanley --- v3: - Add GPIO include - Add unit name for memory node to fix warning --- arch/arm/boot/dts/Makefile | 4 +- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 426 +++++++++++++++++++++++++++++ 2 files changed, 428 insertions(+), 2 deletions(-) create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts -- 2.15.1 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 15a9207319c1..48c55f307aa9 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1105,6 +1105,6 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-ast2500-evb.dtb \ aspeed-bmc-opp-palmetto.dtb \ aspeed-bmc-opp-romulus.dtb \ - aspeed-bmc-opp-witherspoon.dtb - + aspeed-bmc-opp-witherspoon.dtb \ + aspeed-bmc-opp-zaius.dtb endif diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts new file mode 100644 index 000000000000..c881484a85cf --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts @@ -0,0 +1,426 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; +#include "aspeed-g5.dtsi" +#include + +/ { + model = "Zaius BMC"; + compatible = "ingrasys,zaius-bmc", "aspeed,ast2500"; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200 earlyprintk"; + }; + + memory@80000000 { + reg = <0x80000000 0x40000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + flash_memory: region@98000000 { + no-map; + reg = <0x98000000 0x04000000>; /* 64M */ + }; + }; + + onewire0 { + compatible = "w1-gpio"; + gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>; + }; + + onewire1 { + compatible = "w1-gpio"; + gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>; + }; + + onewire2 { + compatible = "w1-gpio"; + gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>; + }; + + onewire3 { + compatible = "w1-gpio"; + gpios = <&gpio ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + checkstop { + label = "checkstop"; + gpios = <&gpio ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + sys_boot_status { + label = "System boot status"; + gpios = <&gpio ASPEED_GPIO(D, 5) GPIO_ACTIVE_LOW>; + }; + + attention { + label = "Attention"; + gpios = <&gpio ASPEED_GPIO(D, 6) GPIO_ACTIVE_LOW>; + }; + + plt_fault { + label = "Platform fault"; + gpios = <&gpio ASPEED_GPIO(D, 7) GPIO_ACTIVE_LOW>; + }; + + hdd_fault { + label = "Onboard drive fault"; + gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>; + }; + }; + + fsi: gpio-fsi { + compatible = "fsi-master-gpio", "fsi-master"; + #address-cells = <2>; + #size-cells = <0>; + + trans-gpios = <&gpio ASPEED_GPIO(O, 6) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; + clock-gpios = <&gpio ASPEED_GPIO(G, 0) GPIO_ACTIVE_HIGH>; + data-gpios = <&gpio ASPEED_GPIO(G, 1) GPIO_ACTIVE_HIGH>; + mux-gpios = <&gpio ASPEED_GPIO(P, 6) GPIO_ACTIVE_HIGH>; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, + <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>, + <&adc 13>, <&adc 14>, <&adc 15>; + }; + + iio-hwmon-battery { + compatible = "iio-hwmon"; + io-channels = <&adc 12>; + }; + +}; + +&fmc { + status = "okay"; + + flash@0 { + status = "okay"; + label = "bmc"; + m25p,fast-read; +#include "openbmc-flash-layout.dtsi" + }; +}; + +&spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default>; + + flash@0 { + status = "okay"; + label = "pnor"; + m25p,fast-read; + }; +}; + +&spi2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi2ck_default + &pinctrl_spi2cs0_default + &pinctrl_spi2cs1_default + &pinctrl_spi2miso_default + &pinctrl_spi2mosi_default>; + + flash@0 { + status = "okay"; + }; +}; + +&uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_txd1_default + &pinctrl_rxd1_default>; +}; + +&lpc_ctrl { + status = "okay"; + memory-region = <&flash_memory>; + flash = <&spi1>; +}; + +&lpc_snoop { + status = "okay"; + snoop-ports = <0x80>; +}; + + +&uart5 { + status = "okay"; +}; + +&mac0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii1_default>; + use-ncsi; +}; + +&mac1 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; +}; + +&i2c0 { + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c64"; + reg = <0x50>; + pagesize = <32>; + }; + + rtc@68 { + compatible = "nxp,pcf8523"; + reg = <0x68>; + }; + + ucd90160@64 { + compatible = "ti,ucd90160"; + reg = <0x64>; + }; + + /* Power sequencer UCD90160 PMBUS @64h + * FRU AT24C64D @50h + * RTC PCF8523 @68h + * Clock buffer 9DBL04 @6dh + */ +}; + +&i2c1 { + status = "okay"; + + i2c-switch@71 { + compatible = "nxp,pca9546"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* MUX1 PCA9546A @71h + * PCIe 0 + * PCIe 1 + * PCIe 2 + * TPM header + */ +}; + +&i2c2 { + status = "disabled"; + + /* OCP Mezz Connector A (OOB SMBUS) */ +}; + +&i2c3 { + status = "disabled"; + + /* OCP Mezz Connector A (PCIe slot SMBUS) */ +}; + +&i2c4 { + status = "okay"; + + i2c-switch@71 { + compatible = "nxp,pca9546"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* MUX1 PCA9546A @71h + * PCIe 3 + * PCIe 4 + */ +}; + + +&i2c5 { + status = "disabled"; + + /* CPU0 PRM 0.7V */ + /* CPU0 PRM 1.2V CH03 */ + /* CPU0 PRM 0.8V */ + /* CPU0 PRM 1.2V CH47 */ +}; + +&i2c6 { + status = "disabled"; + + /* CPU1 PRM 0.7V */ + /* CPU1 PRM 1.2V CH03 */ + /* CPU1 PRM 0.8V */ + /* CPU1 PRM 1.2V CH47 */ +}; + +&i2c7 { + status = "okay"; + + pca9541a@70 { + compatible = "nxp,pca9541"; + reg = <0x70>; + + i2c-arb { + #address-cells = <1>; + #size-cells = <0>; + + hotswap@54 { + compatible = "ti,lm5066i"; + reg = <0x54>; + }; + }; + }; + + /* Master selector PCA9541A @70h (other master: CPU0) + * LM5066I PMBUS @10h + */ + + /* 12V Quarter Brick DC/DC Converter Q54SJ12050 @61h */ + power-brick@61 { + compatible = "delta,dps800"; + reg = <0x61>; + }; + + /* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */ + /* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */ + /* CPU0 VR ISL68137 0.8V PMBUS @60h */ + /* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @41h */ + /* CPU0 VR ISL68137 1.2V CH47 PMBUS @41h */ +}; + +&i2c8 { + status = "okay"; + + /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */ + /* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */ + /* CPU1 VR ISL68137 0.8V PMBUS @61h */ + /* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */ + /* CPU0 VR ISL68137 1.2V CH47 PMBUS @45h */ +}; + + +&i2c9 { + status = "disabled"; + + /* Fan board */ +}; + +&i2c10 { + status = "disabled"; +}; + +&i2c11 { + status = "disabled"; + + /* GPU sideband */ +}; + +&i2c12 { + status = "disabled"; +}; + +&i2c13 { + status = "disabled"; + + /* MUX PI3USB102 + * CPU0 debug + * CPU1 debug + */ +}; + +&pinctrl { + aspeed,external-nodes = <&gfx &lhc>; + + pinctrl_gpioh_unbiased: gpioi_unbiased { + pins = "A8", "C7", "B7", "A7", "D7", "B6", "A6", "E7"; + bias-disable; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpioh_unbiased>; + + line_iso_u146_en { + gpio-hog; + gpios = ; + output-high; + line-name = "iso_u164_en"; + }; + + ncsi_mux_en_n { + gpio-hog; + gpios = ; + output-low; + line-name = "ncsi_mux_en_n"; + }; + + line_bmc_i2c2_sw_rst_n { + gpio-hog; + gpios = ; + output-high; + line-name = "bmc_i2c2_sw_rst_n"; + }; + + line_bmc_i2c5_sw_rst_n { + gpio-hog; + gpios = ; + output-high; + line-name = "bmc_i2c5_sw_rst_n"; + }; +}; + +&vuart { + status = "okay"; +}; + +&gfx { + status = "okay"; +}; + +&pwm_tacho { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default + &pinctrl_pwm2_default &pinctrl_pwm3_default>; + + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00>; + }; + + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x01>; + }; + + fan@2 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x02>; + }; + + fan@3 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x03>; + }; +}; From patchwork Wed Dec 20 03:23:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122442 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5025560qgn; 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This adds the device tree description for most upstream components. It is a squashed commit from the OpenBMC kernel tree. Signed-off-by: Peter Hanson Signed-off-by: Andrew Jeffery Signed-off-by: Patrick Venture Signed-off-by: Rick Altherr Signed-off-by: Joel Stanley --- v3: - Add GPIO include - Add unit name to memory node to fix warning --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 458 +++++++++++++++++++++++++++ 2 files changed, 460 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts -- 2.15.1 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 48c55f307aa9..5ab5d9169511 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1106,5 +1106,6 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-opp-palmetto.dtb \ aspeed-bmc-opp-romulus.dtb \ aspeed-bmc-opp-witherspoon.dtb \ - aspeed-bmc-opp-zaius.dtb + aspeed-bmc-opp-zaius.dtb \ + aspeed-bmc-quanta-q71l.dtb endif diff --git a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts new file mode 100644 index 000000000000..76aa6ea1f988 --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts @@ -0,0 +1,458 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; +#include "aspeed-g4.dtsi" +#include + +/ { + model = "Quanta Q71L BMC"; + compatible = "quanta,q71l-bmc", "aspeed,ast2400"; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200 earlyprintk"; + }; + + memory@40000000 { + reg = <0x40000000 0x8000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vga_memory: framebuffer@47800000 { + no-map; + reg = <0x47800000 0x00800000>; /* 8MB */ + }; + }; + + leds { + compatible = "gpio-leds"; + + heartbeat { + gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>; + }; + + power { + gpios = <&gpio ASPEED_GPIO(B, 2) GPIO_ACTIVE_LOW>; + }; + + identify { + gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, + <&adc 8>, <&adc 9>, <&adc 10>; + }; + + iio-hwmon-battery { + compatible = "iio-hwmon"; + io-channels = <&adc 11>; + }; + + i2c1mux: i2cmux { + compatible = "i2c-mux-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + /* mux-gpios = <&sgpio 10 GPIO_ACTIVE_HIGH> */ + i2c-parent = <&i2c1>; + }; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + label = "bmc"; + m25p,fast-read; +#include "openbmc-flash-layout.dtsi" + }; +}; + +&spi { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default>; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "pnor"; + }; +}; + +&pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_vgahs_default &pinctrl_vgavs_default + &pinctrl_ddcclk_default &pinctrl_ddcdat_default>; +}; + +&lpc_snoop { + status = "okay"; + snoop-ports = <0x80>; +}; + +&mac0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii1_default>; + use-ncsi; +}; + +&mac1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; +}; + +&uart5 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + /* temp2 inlet */ + tmp75@4c { + compatible = "ti,tmp75"; + reg = <0x4c>; + }; + + /* temp3 */ + tmp75@4e { + compatible = "ti,tmp75"; + reg = <0x4e>; + }; + + /* temp1 */ + tmp75@4f { + compatible = "ti,tmp75"; + reg = <0x4f>; + }; + + /* Baseboard FRU */ + eeprom@54 { + compatible = "atmel,24c64"; + reg = <0x54>; + }; + + /* FP FRU */ + eeprom@57 { + compatible = "atmel,24c64"; + reg = <0x57>; + }; +}; + +&i2c2 { + status = "okay"; + + /* 0: PCIe Slot 2, + * Slot 3, + * Slot 6, + * Slot 7 + */ + i2c-switch@74 { + compatible = "nxp,pca9546"; + reg = <0x74>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; /* may use mux@77 next. */ + + i2c_pcie2: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c_pcie3: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c_pcie6: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c_pcie7: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; + + /* 0: PCIe Slot 1, + * Slot 4, + * Slot 5, + * Slot 8, + * Slot 9, + * Slot 10, + * SSD 1, + * SSD 2 + */ + i2c-switch@77 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x77>; + i2c-mux-idle-disconnect; /* may use mux@74 next. */ + + i2c_pcie1: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c_pcie4: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c_pcie5: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c_pcie8: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + + i2c_pcie9: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + + i2c_pcie10: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + + i2c_ssd1: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + }; + + i2c_ssd2: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; + }; +}; + +&i2c3 { + status = "okay"; + + /* BIOS FRU */ + eeprom@56 { + compatible = "atmel,24c64"; + reg = <0x56>; + }; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; +}; + +&i2c7 { + status = "okay"; + + /* 0: PSU4 + * PSU1 + * PSU3 + * PSU2 + */ + i2c-switch@70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + i2c_psu4: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c_psu1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c_psu3: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c_psu2: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; + + /* PDB FRU */ + eeprom@52 { + compatible = "atmel,24c64"; + reg = <0x52>; + }; +}; + +&i2c8 { + status = "okay"; + + /* BMC FRU */ + eeprom@50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; +}; + +&vuart { + status = "okay"; +}; + +&wdt2 { + status = "okay"; +}; + +&pwm_tacho { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default + &pinctrl_pwm1_default + &pinctrl_pwm2_default + &pinctrl_pwm3_default>; + + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00>; + }; + + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x01>; + }; + + fan@2 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x02>; + }; + + fan@3 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x03>; + }; + + fan@4 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x04>; + }; + + fan@5 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x05>; + }; + + fan@6 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x06>; + }; + + fan@7 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x07>; + }; +}; + +&i2c1mux { + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + /* Memory Riser 1 FRU */ + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + + /* Memory Riser 2 FRU */ + eeprom@51 { + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + /* Memory Riser 3 FRU */ + eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Memory Riser 4 FRU */ + eeprom@53 { + compatible = "atmel,24c02"; + reg = <0x53>; + }; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + /* Memory Riser 5 FRU */ + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + + /* Memory Riser 6 FRU */ + eeprom@51 { + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + /* Memory Riser 7 FRU */ + eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Memory Riser 8 FRU */ + eeprom@53 { + compatible = "atmel,24c02"; + reg = <0x53>; + }; + }; +}; From patchwork Wed Dec 20 03:23:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122443 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5025745qgn; Tue, 19 Dec 2017 19:27:17 -0800 (PST) X-Google-Smtp-Source: ACJfBos4nVLLc6Ra6UwZi+DuYBfv/VKX3jZZTViS/XjkyBXMzbM13xRq+wwSEOnc3d++g3vxrz/k X-Received: by 10.98.155.22 with SMTP id r22mr5331849pfd.96.1513740437181; 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Tue, 19 Dec 2017 19:27:07 -0800 (PST) Received: from aurora.jms.id.au ([45.124.203.15]) by smtp.gmail.com with ESMTPSA id 77sm32295307pfh.43.2017.12.19.19.26.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Dec 2017 19:27:06 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 20 Dec 2017 13:56:56 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH v3 18/20] ARM: dts: aspeed-romulus: Update Romulus system Date: Wed, 20 Dec 2017 13:53:26 +1030 Message-Id: <20171220032328.30584-19-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org - Fix incorrect RAM size - Remove alias; these are now specified in the dtsi - Add newly upstreamed devices - Include OpenBMC flash layout Signed-off-by: Joel Stanley --- v3: - Add GPIO include - Fix duplicate fmc and spi nodes - Add unit name for memory node to fix warning --- arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 133 +++++++++++++++++++++++++-- 1 file changed, 126 insertions(+), 7 deletions(-) -- 2.15.1 Reviewed-by: Cédric Le Goater diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts index a7a9386f964d..623b6ab42021 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts @@ -1,23 +1,19 @@ // SPDX-License-Identifier: GPL-2.0+ /dts-v1/; - #include "aspeed-g5.dtsi" +#include / { model = "Romulus BMC"; compatible = "ibm,romulus-bmc", "aspeed,ast2500"; - aliases { - serial4 = &uart5; - }; - chosen { stdout-path = &uart5; bootargs = "console=ttyS4,115200 earlyprintk"; }; - memory { - reg = <0x80000000 0x40000000>; + memory@80000000 { + reg = <0x80000000 0x20000000>; }; reserved-memory { @@ -29,6 +25,49 @@ no-map; reg = <0xbf000000 0x01000000>; /* 16M */ }; + + flash_memory: region@98000000 { + no-map; + reg = <0x98000000 0x04000000>; /* 64M */ + }; + }; + + leds { + compatible = "gpio-leds"; + + fault { + gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>; + }; + + identify { + gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_HIGH>; + }; + + power { + gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>; + }; + }; + + fsi: gpio-fsi { + compatible = "fsi-master-gpio", "fsi-master"; + #address-cells = <2>; + #size-cells = <0>; + + clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; + data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>; + mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; + trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + checkstop { + label = "checkstop"; + gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; + linux,code = ; + }; }; }; @@ -38,6 +77,7 @@ status = "okay"; m25p,fast-read; label = "bmc"; +#include "openbmc-flash-layout.dtsi" }; }; @@ -53,6 +93,12 @@ }; }; +&lpc_ctrl { + status = "okay"; + memory-region = <&flash_memory>; + flash = <&spi1>; +}; + &uart1 { /* Rear RS-232 connector */ status = "okay"; @@ -81,6 +127,10 @@ pinctrl-0 = <&pinctrl_rmii1_default>; }; +&i2c1 { + status = "okay"; +}; + &i2c2 { status = "okay"; }; @@ -133,8 +183,77 @@ &i2c12 { status = "okay"; + + max31785@52 { + compatible = "maxim,max31785"; + reg = <0x52>; + }; +}; + +&gpio { + nic_func_mode0 { + gpio-hog; + gpios = ; + output-low; + line-name = "nic_func_mode0"; + }; + nic_func_mode1 { + gpio-hog; + gpios = ; + output-low; + line-name = "nic_func_mode1"; + }; }; &vuart { status = "okay"; }; + +&gfx { + status = "okay"; +}; + +&pinctrl { + aspeed,external-nodes = <&gfx &lhc>; +}; + +&pwm_tacho { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>; + + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x08>; + }; + + fan@1 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x09>; + }; + + fan@2 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x0a>; + }; + + fan@3 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x0b>; + }; + + fan@4 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x0c>; + }; + + fan@5 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x0d>; + }; + + fan@6 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x0e>; + }; +};