From patchwork Thu Oct 8 09:26:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 317469 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp1171896ilm; Thu, 8 Oct 2020 02:30:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyuMLC7pd0UhYgKv6hEycKQCtULsVasVNRzmq0sBUTXfN4hJPAtahRwrQnfXFwz4NS98+wo X-Received: by 2002:a17:906:6682:: with SMTP id z2mr8222091ejo.434.1602149432251; Thu, 08 Oct 2020 02:30:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602149432; cv=none; d=google.com; s=arc-20160816; b=fY/8YcCu71d1/lGQB2A+wjKbB/edbOkxmr4nNKmgQc6r2u/LllCluf8LdrQW4pgqlg DFiERkwSqKHW5v9HVfDwmswykb/dNWp8fzTOGZpqNJt1BodWeDplKxXK++6HlubL8tBb 6Y6n6MM1a5a3r/wObHs/ABDItURXljIIfAZEEePXcrp3SWkHVXy6tUAGcPb/DSy2dZII g1aMZIlQgpANh1pAwivvH09ER2ZGr3lwNC8psY8NXbp4Ay5P0VWRzbTRn4kL2AC86MhJ 9kkc4jNRvWbkqzXsmVG1eBmYqBQYo9dFUf+LjTWG6tLDyhZ4RWR8MR3oMl/oQaLOi/vM /iiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=HAucnIKWPn5FbrfFft1Rku7LpbsFOwKuDoKUOR40/pM=; b=pb6INtB3kEoF6PgWYKdacAj46m4unlYIUJG60k1Jxn6ZS83DnQM8cfcZvpyAsdKT5R GUtx4p9nTJJRr1kt3MwdMVmccYmo0EpH0gOF6D3iaGsrZDQZwsJFMvMqf5LLt7b+UlTW DiMx1f/fHP3CJ9gGXS2bhK9Yzs0sYlMoXDCee9FrbCikkZ4UIGobT4HAMyExWzGEJ3Az 0MOVpEIeYeUZRDEzjNEiLpnzpfIDIzVPrFKO/65VkU/SV3Sje3rodBS4EaiGzcp5/n5o j2v20w+Yiko8I5iflKfg5hmhsXAhXE93NOQIyhd3KDzDDkkxm5UiU/UN6dgio240D4F+ ARuQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c93si3155656edf.452.2020.10.08.02.30.32; Thu, 08 Oct 2020 02:30:32 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729090AbgJHJab (ORCPT + 6 others); Thu, 8 Oct 2020 05:30:31 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:14804 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725916AbgJHJaR (ORCPT ); Thu, 8 Oct 2020 05:30:17 -0400 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 6E103ECD54A08E73DFF7; Thu, 8 Oct 2020 17:30:14 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 8 Oct 2020 17:30:05 +0800 From: John Garry To: , , , , , CC: , , , , , , , John Garry Subject: [PATCH v2 1/4] drivers/perf: hisi: Add identifier sysfs file Date: Thu, 8 Oct 2020 17:26:18 +0800 Message-ID: <1602149181-237415-2-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1602149181-237415-1-git-send-email-john.garry@huawei.com> References: <1602149181-237415-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org To allow userspace to identify the specific implementation of the device, add an "identifier" sysfs file. Encoding is as follows (same for all uncore drivers): hi1620: 0x0 hi1630: 0x30 Signed-off-by: John Garry --- drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 16 ++++++++++++++++ drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 16 ++++++++++++++++ drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 16 ++++++++++++++++ drivers/perf/hisilicon/hisi_uncore_pmu.c | 10 ++++++++++ drivers/perf/hisilicon/hisi_uncore_pmu.h | 7 +++++++ 5 files changed, 65 insertions(+) -- 2.26.2 diff --git a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c index 5e3645c96443..5ac6c9113767 100644 --- a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c @@ -33,6 +33,7 @@ #define DDRC_INT_MASK 0x6c8 #define DDRC_INT_STATUS 0x6cc #define DDRC_INT_CLEAR 0x6d0 +#define DDRC_VERSION 0x710 /* DDRC has 8-counters */ #define DDRC_NR_COUNTERS 0x8 @@ -267,6 +268,8 @@ static int hisi_ddrc_pmu_init_data(struct platform_device *pdev, return PTR_ERR(ddrc_pmu->base); } + ddrc_pmu->identifier = readl(ddrc_pmu->base + DDRC_VERSION); + return 0; } @@ -308,10 +311,23 @@ static const struct attribute_group hisi_ddrc_pmu_cpumask_attr_group = { .attrs = hisi_ddrc_pmu_cpumask_attrs, }; +static struct device_attribute hisi_ddrc_pmu_identifier_attr = + __ATTR(identifier, 0444, hisi_uncore_pmu_identifier_attr_show, NULL); + +static struct attribute *hisi_ddrc_pmu_identifier_attrs[] = { + &hisi_ddrc_pmu_identifier_attr.attr, + NULL +}; + +static struct attribute_group hisi_ddrc_pmu_identifier_group = { + .attrs = hisi_ddrc_pmu_identifier_attrs, +}; + static const struct attribute_group *hisi_ddrc_pmu_attr_groups[] = { &hisi_ddrc_pmu_format_group, &hisi_ddrc_pmu_events_group, &hisi_ddrc_pmu_cpumask_attr_group, + &hisi_ddrc_pmu_identifier_group, NULL, }; diff --git a/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c b/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c index 5eb8168029c0..41b2dceb5f26 100644 --- a/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c @@ -23,6 +23,7 @@ #define HHA_INT_MASK 0x0804 #define HHA_INT_STATUS 0x0808 #define HHA_INT_CLEAR 0x080C +#define HHA_VERSION 0x1cf0 #define HHA_PERF_CTRL 0x1E00 #define HHA_EVENT_CTRL 0x1E04 #define HHA_EVENT_TYPE0 0x1E80 @@ -261,6 +262,8 @@ static int hisi_hha_pmu_init_data(struct platform_device *pdev, return PTR_ERR(hha_pmu->base); } + hha_pmu->identifier = readl(hha_pmu->base + HHA_VERSION); + return 0; } @@ -320,10 +323,23 @@ static const struct attribute_group hisi_hha_pmu_cpumask_attr_group = { .attrs = hisi_hha_pmu_cpumask_attrs, }; +static struct device_attribute hisi_hha_pmu_identifier_attr = + __ATTR(identifier, 0444, hisi_uncore_pmu_identifier_attr_show, NULL); + +static struct attribute *hisi_hha_pmu_identifier_attrs[] = { + &hisi_hha_pmu_identifier_attr.attr, + NULL +}; + +static struct attribute_group hisi_hha_pmu_identifier_group = { + .attrs = hisi_hha_pmu_identifier_attrs, +}; + static const struct attribute_group *hisi_hha_pmu_attr_groups[] = { &hisi_hha_pmu_format_group, &hisi_hha_pmu_events_group, &hisi_hha_pmu_cpumask_attr_group, + &hisi_hha_pmu_identifier_group, NULL, }; diff --git a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c index 3e8b5eab5514..705501d18d03 100644 --- a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c @@ -25,6 +25,7 @@ #define L3C_INT_STATUS 0x0808 #define L3C_INT_CLEAR 0x080c #define L3C_EVENT_CTRL 0x1c00 +#define L3C_VERSION 0x1cf0 #define L3C_EVENT_TYPE0 0x1d00 /* * Each counter is 48-bits and [48:63] are reserved @@ -264,6 +265,8 @@ static int hisi_l3c_pmu_init_data(struct platform_device *pdev, return PTR_ERR(l3c_pmu->base); } + l3c_pmu->identifier = readl(l3c_pmu->base + L3C_VERSION); + return 0; } @@ -310,10 +313,23 @@ static const struct attribute_group hisi_l3c_pmu_cpumask_attr_group = { .attrs = hisi_l3c_pmu_cpumask_attrs, }; +static struct device_attribute hisi_l3c_pmu_identifier_attr = + __ATTR(identifier, 0444, hisi_uncore_pmu_identifier_attr_show, NULL); + +static struct attribute *hisi_l3c_pmu_identifier_attrs[] = { + &hisi_l3c_pmu_identifier_attr.attr, + NULL +}; + +static struct attribute_group hisi_l3c_pmu_identifier_group = { + .attrs = hisi_l3c_pmu_identifier_attrs, +}; + static const struct attribute_group *hisi_l3c_pmu_attr_groups[] = { &hisi_l3c_pmu_format_group, &hisi_l3c_pmu_events_group, &hisi_l3c_pmu_cpumask_attr_group, + &hisi_l3c_pmu_identifier_group, NULL, }; diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisilicon/hisi_uncore_pmu.c index 97aff877a4e7..9dbdc3fc3bb4 100644 --- a/drivers/perf/hisilicon/hisi_uncore_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c @@ -119,6 +119,16 @@ int hisi_uncore_pmu_get_event_idx(struct perf_event *event) } EXPORT_SYMBOL_GPL(hisi_uncore_pmu_get_event_idx); +ssize_t hisi_uncore_pmu_identifier_attr_show(struct device *dev, + struct device_attribute *attr, + char *page) +{ + struct hisi_pmu *hisi_pmu = to_hisi_pmu(dev_get_drvdata(dev)); + + return snprintf(page, PAGE_SIZE, "0x%08x\n", hisi_pmu->identifier); +} +EXPORT_SYMBOL_GPL(hisi_uncore_pmu_identifier_attr_show); + static void hisi_uncore_pmu_clear_event_idx(struct hisi_pmu *hisi_pmu, int idx) { if (!hisi_uncore_pmu_counter_valid(hisi_pmu, idx)) { diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.h b/drivers/perf/hisilicon/hisi_uncore_pmu.h index 25b0c97b3eb0..14ecaf763153 100644 --- a/drivers/perf/hisilicon/hisi_uncore_pmu.h +++ b/drivers/perf/hisilicon/hisi_uncore_pmu.h @@ -74,6 +74,7 @@ struct hisi_pmu { int counter_bits; /* check event code range */ int check_event; + u32 identifier; }; int hisi_uncore_pmu_counter_valid(struct hisi_pmu *hisi_pmu, int idx); @@ -96,4 +97,10 @@ ssize_t hisi_cpumask_sysfs_show(struct device *dev, struct device_attribute *attr, char *buf); int hisi_uncore_pmu_online_cpu(unsigned int cpu, struct hlist_node *node); int hisi_uncore_pmu_offline_cpu(unsigned int cpu, struct hlist_node *node); + +ssize_t hisi_uncore_pmu_identifier_attr_show(struct device *dev, + struct device_attribute *attr, + char *page); + + #endif /* __HISI_UNCORE_PMU_H__ */ From patchwork Thu Oct 8 09:26:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 317467 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp1171859ilm; Thu, 8 Oct 2020 02:30:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy4O9TzJqJqoo5HICqFZ3OY1mzrxtyr0FMYEtScGSDmA7i09l3vz/26vuZUu+oCRufq2Hgy X-Received: by 2002:a17:906:dc5:: with SMTP id p5mr8205361eji.116.1602149429233; Thu, 08 Oct 2020 02:30:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602149429; cv=none; d=google.com; s=arc-20160816; b=Ji1iB/aqp3jL3d4lRecpvWu3w4CmSV6ayToE8XJR5PcTzQw8KQ3rtKb9OCyyPbUe53 ioE2S6wSe0QGwO4Pnc/Mjc9L3yCCwmlaAMJC6D3BBPIv4u6qg/FjCKk918RQBoO1GvNc Sj9+e71+7S4uNYC+5nr+5yE0gInn6hH1zk+Vv36A2lW4Cdsu+wHksOA7jjFLUuKvxgq/ FROUiSKtdZTY9ah9idVyN87ZES2N28TE9CRjvbuebELV0xqKsng+fnuCzd58Ifits6XU 9aIGiGdN1QUFeemLgersG8S5xeu5gI+3KdRIcQG10KobZc54BnasNqVvVxC/wohM0OuJ gM/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=m52GcQ5UqE3goqdqdyJoXCSAuy1nr93xz0dk2YElHco=; b=U01xkVOq+lt3GWXDy2+AfXWEuaoVmrcZerXE7/mNK+QauyUaFp/JQ1QpY0xDrAgRLN SUUjRvbJ3oEaWERmTqA4hips1rdwOdFnhGgugIAOyTXE/UGyw4w/0E09etCNEn3bY5NR bTdYm+wC/NTU8S03cRAHQ1YSx1FeUKxoKvQMlu//+X488uFfyisMEH5IKdg5mwEKsMgb 3+QxAP6xTEqptAj/db6lhiRf3hPuo9OErT2W5VxUkF6223U2TusE2m37ETQO9I0/nfeP U63is5bDe7/Kp20Ghj0d/339i+/cu9MUYlCWEFB+NvIoivxQ2M/kEJUtm7818YNURRgf lRsw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c93si3155656edf.452.2020.10.08.02.30.29; Thu, 08 Oct 2020 02:30:29 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729009AbgJHJaS (ORCPT + 6 others); Thu, 8 Oct 2020 05:30:18 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:35168 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725882AbgJHJaR (ORCPT ); Thu, 8 Oct 2020 05:30:17 -0400 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 54306FA8F27CEE140F91; Thu, 8 Oct 2020 17:30:14 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 8 Oct 2020 17:30:05 +0800 From: John Garry To: , , , , , CC: , , , , , , , John Garry Subject: [PATCH v2 2/4] bindings/perf/imx-ddr: update compatible string Date: Thu, 8 Oct 2020 17:26:19 +0800 Message-ID: <1602149181-237415-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1602149181-237415-1-git-send-email-john.garry@huawei.com> References: <1602149181-237415-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Joakim Zhang Update compatible string according to driver change. [jpg: keep "fsl,imx8m-ddr-pmu", which was being removed] Signed-off-by: Joakim Zhang Signed-off-by: John Garry --- Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt | 3 +++ 1 file changed, 3 insertions(+) -- 2.26.2 diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt index 7822a806ea0a..cc38c7fd7049 100644 --- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt +++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt @@ -5,6 +5,9 @@ Required properties: - compatible: should be one of: "fsl,imx8-ddr-pmu" "fsl,imx8m-ddr-pmu" + "fsl,imx8mq-ddr-pmu" + "fsl,imx8mm-ddr-pmu" + "fsl,imx8mn-ddr-pmu" "fsl,imx8mp-ddr-pmu" - reg: physical address and size From patchwork Thu Oct 8 09:26:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 317468 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp1171877ilm; Thu, 8 Oct 2020 02:30:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz9YD3+w0/pClUdmRxNR3MiP/kv7SAebGmYbtCX3yLdhT9VebrTWHkvpmq9oyUPeKIcV2zR X-Received: by 2002:a17:906:53d7:: with SMTP id p23mr7590361ejo.232.1602149430701; Thu, 08 Oct 2020 02:30:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602149430; cv=none; d=google.com; s=arc-20160816; b=hwwv6kwn64G3T7gC1eCR6bKIiPd6K503pyZLHgpj+4N1ojOpaktOqiuw58Bul6ow7H qYSTHRZOCM+rssdcO80OFlgQ+UW4OKhayi5VLhSRfhFFFJsYfSKjCkbNsDdaN3X4cg8S 55hvpufpdiulExm+R7bKAhB/9Jj0GRtcFJrOU23zD6dfN+kgwvaNxqiwu9E8rmzW/viP lL94WzHsMJnp7K0oCtqbWHbR5wFwX5+sx73xa7ZF0+P+a4AO+q+9u5dItEHwEKi4GzGY ES09vNMsY1iTFUbRSoFebuVv/o/iGAeVmzDo0JvNhdzl4CTLH0Yj5XZ0ntx92FqbJUvA 913Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=DkQffVzRy1LiNuA9+PqZ+X/O/xD5DmZ+GFLk4/pgH4k=; b=xx03MugKdRvll8TNpec52FgaX5+0OLKQ434q1rjVZwdKPIhV7amUQE4M4v4j7MVCpU 8IvL4pfFTzKKA014D2dGqtcqIzj2GFnfzByPj2jRduKyY8FXfkUkCZ7vRsejCAbGeFXt RJXKk3JlvqGHWRFCU21IlsiymReouxj+cFx/gLkCCvalKQyQ8OZBtgWLQjUSsGsbbY2C ytlPO6qlto4MkLXGMQj+06b6TEHawq18legmma6nYW3E8SxJBTcrhwimazd2T5aJq3uo LvBu5R1kiXh7RQFogPkvu6A3wkJsHwtDtbVPiXSjiHfRDhfvnr+FNVcL/ahiqjVHdBKw JvgQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c93si3155656edf.452.2020.10.08.02.30.30; Thu, 08 Oct 2020 02:30:30 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728996AbgJHJaS (ORCPT + 6 others); Thu, 8 Oct 2020 05:30:18 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:35156 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726273AbgJHJaR (ORCPT ); Thu, 8 Oct 2020 05:30:17 -0400 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 4D36BE57EAAFBFC61C40; Thu, 8 Oct 2020 17:30:14 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 8 Oct 2020 17:30:05 +0800 From: John Garry To: , , , , , CC: , , , , , , , John Garry Subject: [PATCH v2 3/4] perf/imx_ddr: Add system PMU identifier for userspace Date: Thu, 8 Oct 2020 17:26:20 +0800 Message-ID: <1602149181-237415-4-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1602149181-237415-1-git-send-email-john.garry@huawei.com> References: <1602149181-237415-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Joakim Zhang The DDR Perf for i.MX8 is a system PMU whose AXI ID would different from SoC to SoC. Need expose system PMU identifier for userspace which refer to /sys/bus/event_source/devices//identifier. Reviewed-by: John Garry Signed-off-by: Joakim Zhang Signed-off-by: John Garry --- drivers/perf/fsl_imx8_ddr_perf.c | 45 +++++++++++++++++++++++++++++--- 1 file changed, 42 insertions(+), 3 deletions(-) -- 2.26.2 diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c index 397540a4b799..c537cd9b8142 100644 --- a/drivers/perf/fsl_imx8_ddr_perf.c +++ b/drivers/perf/fsl_imx8_ddr_perf.c @@ -50,21 +50,38 @@ static DEFINE_IDA(ddr_ida); struct fsl_ddr_devtype_data { unsigned int quirks; /* quirks needed for different DDR Perf core */ + const char *identifier; /* system PMU identifier for userspace */ }; -static const struct fsl_ddr_devtype_data imx8_devtype_data; +static const struct fsl_ddr_devtype_data imx8_devtype_data = { + .identifier = "i.MX8", +}; + +static const struct fsl_ddr_devtype_data imx8mq_devtype_data = { + .quirks = DDR_CAP_AXI_ID_FILTER, + .identifier = "i.MX8MQ", +}; + +static const struct fsl_ddr_devtype_data imx8mm_devtype_data = { + .quirks = DDR_CAP_AXI_ID_FILTER, + .identifier = "i.MX8MM", +}; -static const struct fsl_ddr_devtype_data imx8m_devtype_data = { +static const struct fsl_ddr_devtype_data imx8mn_devtype_data = { .quirks = DDR_CAP_AXI_ID_FILTER, + .identifier = "i.MX8MN", }; static const struct fsl_ddr_devtype_data imx8mp_devtype_data = { .quirks = DDR_CAP_AXI_ID_FILTER_ENHANCED, + .identifier = "i.MX8MP", }; static const struct of_device_id imx_ddr_pmu_dt_ids[] = { { .compatible = "fsl,imx8-ddr-pmu", .data = &imx8_devtype_data}, - { .compatible = "fsl,imx8m-ddr-pmu", .data = &imx8m_devtype_data}, + { .compatible = "fsl,imx8mq-ddr-pmu", .data = &imx8mq_devtype_data}, + { .compatible = "fsl,imx8mm-ddr-pmu", .data = &imx8mm_devtype_data}, + { .compatible = "fsl,imx8mn-ddr-pmu", .data = &imx8mn_devtype_data}, { .compatible = "fsl,imx8mp-ddr-pmu", .data = &imx8mp_devtype_data}, { /* sentinel */ } }; @@ -84,6 +101,27 @@ struct ddr_pmu { int id; }; +static ssize_t ddr_perf_identifier_show(struct device *dev, + struct device_attribute *attr, + char *page) +{ + struct ddr_pmu *pmu = dev_get_drvdata(dev); + + return sprintf(page, "%s\n", pmu->devtype_data->identifier); +} + +static struct device_attribute ddr_perf_identifier_attr = + __ATTR(identifier, 0444, ddr_perf_identifier_show, NULL); + +static struct attribute *ddr_perf_identifier_attrs[] = { + &ddr_perf_identifier_attr.attr, + NULL, +}; + +static struct attribute_group ddr_perf_identifier_attr_group = { + .attrs = ddr_perf_identifier_attrs, +}; + enum ddr_perf_filter_capabilities { PERF_CAP_AXI_ID_FILTER = 0, PERF_CAP_AXI_ID_FILTER_ENHANCED, @@ -237,6 +275,7 @@ static const struct attribute_group *attr_groups[] = { &ddr_perf_format_attr_group, &ddr_perf_cpumask_attr_group, &ddr_perf_filter_cap_attr_group, + &ddr_perf_identifier_attr_group, NULL, }; From patchwork Thu Oct 8 09:26:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 317465 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp1171755ilm; Thu, 8 Oct 2020 02:30:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyYBE5Jb7/X+8tZpcoNVxIN14fJbq8QHVjat7KUXuA/GGH+6DDtlYTJWaLA7UIi75b6yV0R X-Received: by 2002:a17:906:934d:: with SMTP id p13mr8243497ejw.532.1602149419121; Thu, 08 Oct 2020 02:30:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602149419; cv=none; d=google.com; s=arc-20160816; b=PqHTadGvF0eFTOUcA1mtCkxrXiYrZiPbTQpCDRLwqTmgrDsFH0ndjETJLo+kH3cZfS 93oGtqVsGk0rk9Yfj6iUMa4AuxYsUJCY72CsKeHIfBmgo7cU7L+BE3xySnt+NyHrDeNn o7cE2hNTrUC9Foh64Y+CV0qLhUrpqgQV1JaVl9xHEbM/AHr+u2/XUe3YtM0NqasQSKIs tc81tYI6ZERRzIFup6BJ3Nq0w40jDIqFbOHKLTBKoZCPQ7Flwa7i9YgwKHhmGRI1NT9I a4VyDOYZ9nATVP8OnKH0hBPFxcNbpE8Wgg1dgThf/RH9dCuzot52tz0AjaYuQMLTXxFn kwMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=P5zVVdifQXAGn5LHSP9SDYZEiUqPKjbr2OL8ogmEeQo=; b=NaM1RpF6bC5AuPjC31TMgO6zYULhFkQ4TCHeNtZiR+lKT64YiahtmTu7hcYQKh+j+z cR0E8mAydYRdcGYPpPXal7Uk5/ZOy3a501/ecdA9tMrhEWf8RNXrdNEnGMMakQ5Jw1XB acsNvHp83jEl52HQeLQjv8uoav5uPQDXrDjeX87oRdjKdh/ZqjaNG3ZZYCIVhiU+YpyE z+zexnlNlxhsdzNtXlHWADnNONbONMkZba2ey+wFcrPAYSb0Umvmr+J2tytNs2lQJJDZ YOYuWrtBbN5l4ndDQyvy3YWwF/816yM+tK691m7WXN6xlImuOjthA5+KlpqksUK0DqWv RESg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c93si3155656edf.452.2020.10.08.02.30.18; Thu, 08 Oct 2020 02:30:19 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728037AbgJHJaR (ORCPT + 6 others); Thu, 8 Oct 2020 05:30:17 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:35144 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727709AbgJHJaR (ORCPT ); Thu, 8 Oct 2020 05:30:17 -0400 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 45D49F56B5E2CD97C29D; Thu, 8 Oct 2020 17:30:14 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 8 Oct 2020 17:30:06 +0800 From: John Garry To: , , , , , CC: , , , , , , , John Garry Subject: [PATCH v2 4/4] perf/smmuv3: Support sysfs identifier file Date: Thu, 8 Oct 2020 17:26:21 +0800 Message-ID: <1602149181-237415-5-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1602149181-237415-1-git-send-email-john.garry@huawei.com> References: <1602149181-237415-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SMMU_PMCG_IIDR was added in the SMMUv3.3 spec. For the perf tool to know the specific HW implementation, expose the PMCG_IIDR contents only when set. Signed-off-by: John Garry --- drivers/perf/arm_smmuv3_pmu.c | 39 +++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) -- 2.26.2 diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index 5274f7fe359e..74474bb322c3 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -74,6 +74,7 @@ #define SMMU_PMCG_CFGR_NCTR GENMASK(5, 0) #define SMMU_PMCG_CR 0xE04 #define SMMU_PMCG_CR_ENABLE BIT(0) +#define SMMU_PMCG_IIDR 0xE08 #define SMMU_PMCG_CEID0 0xE20 #define SMMU_PMCG_CEID1 0xE28 #define SMMU_PMCG_IRQ_CTRL 0xE50 @@ -112,6 +113,7 @@ struct smmu_pmu { void __iomem *reloc_base; u64 counter_mask; u32 options; + u32 iidr; bool global_filter; }; @@ -552,6 +554,40 @@ static struct attribute_group smmu_pmu_events_group = { .is_visible = smmu_pmu_event_is_visible, }; +static ssize_t smmu_pmu_identifier_attr_show(struct device *dev, + struct device_attribute *attr, + char *page) +{ + struct smmu_pmu *smmu_pmu = to_smmu_pmu(dev_get_drvdata(dev)); + + return snprintf(page, PAGE_SIZE, "0x%08x\n", smmu_pmu->iidr); +} + +static umode_t smmu_pmu_identifier_attr_visible(struct kobject *kobj, + struct attribute *attr, + int n) +{ + struct device *dev = kobj_to_dev(kobj); + struct smmu_pmu *smmu_pmu = to_smmu_pmu(dev_get_drvdata(dev)); + + if (!smmu_pmu->iidr) + return 0; + return attr->mode; +} + +static struct device_attribute smmu_pmu_identifier_attr = + __ATTR(identifier, 0444, smmu_pmu_identifier_attr_show, NULL); + +static struct attribute *smmu_pmu_identifier_attrs[] = { + &smmu_pmu_identifier_attr.attr, + NULL +}; + +static struct attribute_group smmu_pmu_identifier_group = { + .attrs = smmu_pmu_identifier_attrs, + .is_visible = smmu_pmu_identifier_attr_visible, +}; + /* Formats */ PMU_FORMAT_ATTR(event, "config:0-15"); PMU_FORMAT_ATTR(filter_stream_id, "config1:0-31"); @@ -575,6 +611,7 @@ static const struct attribute_group *smmu_pmu_attr_grps[] = { &smmu_pmu_cpumask_group, &smmu_pmu_events_group, &smmu_pmu_format_group, + &smmu_pmu_identifier_group, NULL }; @@ -795,6 +832,8 @@ static int smmu_pmu_probe(struct platform_device *pdev) return err; } + smmu_pmu->iidr = readl_relaxed(smmu_pmu->reg_base + SMMU_PMCG_IIDR); + name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "smmuv3_pmcg_%llx", (res_0->start) >> SMMU_PMCG_PA_SHIFT); if (!name) {