From patchwork Mon Oct 12 06:12:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317624 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332711ilm; Sun, 11 Oct 2020 23:13:26 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxlA4Q0Sg8pqBRQr7yu5eSJCnWm6RTEPigK2UzYY5zzfA+7yNzk2Pld83UiBhP7B01KZXo8 X-Received: by 2002:aa7:c3ca:: with SMTP id l10mr12724819edr.72.1602483206002; Sun, 11 Oct 2020 23:13:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483205; cv=none; d=google.com; s=arc-20160816; b=iRb5wTHLTMIDWs36l6ci4sE73QIA0CmOR54QX5TxQSR7m4ZGHrief/DjQB5RUTZspn 59qkBE60EQuNX8Zi/ua59wLuprgVEWWfVLMFghXfD2ZBrKDcmbC+aNtoxbQa2AvjLS/b v4AxSzi4sriGSITRyAIOkihICH4AvSgwxCZ+3pSmTixdzthxcAlBl0KXoITU9/rf3gUz u6+FRoRW5dMWR84eumjyNczMxEylhBxwYx/N/h97S+gSJAp4QCVPUx3w/2qu4f19xjNC lpgvD8QSHXz661GI6zqEbeXsUilfvMaBmc3EuHiyFHTAe3oA5CqpW2qypbY15inu3HU5 aZjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=KfltWFsZyiOR4CIPq1y3GTcU4ICQrwfgoAhMQojqfcg=; b=WXO59QDdawAzWXK5oKUVuXgBWVYRqMA7QunfxCbrWLNrCzfrQOdWTMzlT5kA1R/KW5 vAego8zCEKar99b0U4KNo7m+q3SO+W8XVNEI0f+954T1AuGzkjNf2k5H1/hpShHEEq2e 9aF/zIulFlS+3cCv+8E8dtZHiTQE0SXTiLyG5mOdCoAGnhqpAYykgghPGXaCAsGfrrpn ChDl6yQ09yLRgZmE9eMPcfHaBAL3XfwWHfoQ0dybf6AcbGgkTXN5RdEAnaYvIYh/2mZ2 GFm0+9Z25i5EQDJyu+0NCcgvrkNpMGdGOoA5nW+6NuFX0xaNTX+EkPNOsGnTFMa6MGrn Dspw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id pg3si13843761ejb.685.2020.10.11.23.13.25; Sun, 11 Oct 2020 23:13:25 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727225AbgJLGMs (ORCPT + 6 others); Mon, 12 Oct 2020 02:12:48 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33566 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727199AbgJLGMr (ORCPT ); Mon, 12 Oct 2020 02:12:47 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id C002F30AB600401601EA; Mon, 12 Oct 2020 14:12:45 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:36 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 01/10] ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml Date: Mon, 12 Oct 2020 14:12:16 +0800 Message-ID: <20201012061225.1597-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. Change node name to match '^serial(@[0-9a-f,]+)*$' 2. Change clock-names to "baudclk", "apb_pclk". Both of them use the same clock. Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hip01.dtsi | 24 ++++++++++++------------ arch/arm/boot/dts/hip04-d01.dts | 2 +- arch/arm/boot/dts/hip04.dtsi | 6 +++--- 3 files changed, 16 insertions(+), 16 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hip01.dtsi b/arch/arm/boot/dts/hip01.dtsi index 975d39828405f0b..fd09e6d9309c755 100644 --- a/arch/arm/boot/dts/hip01.dtsi +++ b/arch/arm/boot/dts/hip01.dtsi @@ -41,41 +41,41 @@ compatible = "simple-bus"; ranges; - uart0: uart@10001000 { + uart0: serial@10001000 { compatible = "snps,dw-apb-uart"; reg = <0x10001000 0x1000>; - clocks = <&hisi_refclk144mhz>; - clock-names = "apb_pclk"; + clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; interrupts = <0 32 4>; status = "disabled"; }; - uart1: uart@10002000 { + uart1: serial@10002000 { compatible = "snps,dw-apb-uart"; reg = <0x10002000 0x1000>; - clocks = <&hisi_refclk144mhz>; - clock-names = "apb_pclk"; + clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; interrupts = <0 33 4>; status = "disabled"; }; - uart2: uart@10003000 { + uart2: serial@10003000 { compatible = "snps,dw-apb-uart"; reg = <0x10003000 0x1000>; - clocks = <&hisi_refclk144mhz>; - clock-names = "apb_pclk"; + clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; interrupts = <0 34 4>; status = "disabled"; }; - uart3: uart@10006000 { + uart3: serial@10006000 { compatible = "snps,dw-apb-uart"; reg = <0x10006000 0x1000>; - clocks = <&hisi_refclk144mhz>; - clock-names = "apb_pclk"; + clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; interrupts = <0 4 4>; status = "disabled"; diff --git a/arch/arm/boot/dts/hip04-d01.dts b/arch/arm/boot/dts/hip04-d01.dts index 9019e0d2ef60b67..f5691dbc26d2419 100644 --- a/arch/arm/boot/dts/hip04-d01.dts +++ b/arch/arm/boot/dts/hip04-d01.dts @@ -22,7 +22,7 @@ }; soc { - uart0: uart@4007000 { + uart0: serial@4007000 { status = "ok"; }; }; diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi index 555bc6b6720fc94..bccf5ba3d8553c2 100644 --- a/arch/arm/boot/dts/hip04.dtsi +++ b/arch/arm/boot/dts/hip04.dtsi @@ -250,12 +250,12 @@ <0 79 4>; }; - uart0: uart@4007000 { + uart0: serial@4007000 { compatible = "snps,dw-apb-uart"; reg = <0x4007000 0x1000>; interrupts = <0 381 4>; - clocks = <&clk_168m>; - clock-names = "uartclk"; + clocks = <&clk_168m>, <&clk_168m>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; status = "disabled"; }; From patchwork Mon Oct 12 06:12:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317620 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332479ilm; Sun, 11 Oct 2020 23:13:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw8I+PhIEKXlA4ACT5la3Uq7PgsnlT50Qcht5QpLc73ofrivIcb/UiDsq7+ht4dLr7UMGmb X-Received: by 2002:aa7:dbcb:: with SMTP id v11mr12490059edt.351.1602483186850; Sun, 11 Oct 2020 23:13:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483186; cv=none; d=google.com; s=arc-20160816; b=TUz4XiMPi+novSOr0+W6QKek9sw8rfJgjnmT9dhYyfB/sxvqUjmC1mtRo1ytTCGLS6 IOtqdEK0MfbcJR4rxHXIP/hV55DvQk+zwcfnNdHlcpW6LJ/BpnO2G8fdtRk6Af2x/HGY N4LId35kiH3EGQA+7v4/4SCn4b/wOSzF8jaD/W0disgplliMuDfe0DgwuSCBSQW6bMMg TstFIGovtU6SYrc5V6P2Vm7SkF2Iblid67FUGgt2ajruRhO7oEALPR4mXjDQVcrFOz4Z PvKjpp4L38YUueA0QxoLy4npZllsJgSjUD4U1e5FBeQFpCmG+LxOc1+cnRVj++OZFXHZ rRGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=FGANchPFiHpcR/swpl+FmObC+k8LHmYhk0FQT00Bm7E=; b=i8bTOwv1udDj9FGTg3u27nMFtGAxKz42Dal8fIGvxDEb6GKVmsacTx6LP7oS0uyNLv Ikdvbk/lYkR9WjBx7KDcy+QAAGtThUPcv7OqbsnoCgphBX0XCPcpMz7528NFSP/zhNrN N6eMDifsEZkiJyWysTssjNSg1fgwT0qyyJzh/KaeARqIvmezM0e3IdbtYfrI+AWFiQFG s0W4sIpJONEjITqc4fCV3fZSkwFONfHSHrc7vQPlL5u5fHFYkc4RZ9MTCRCWtrRwEIAH 57IZwFtQpAChv+5vb+rQCk1cwKeDnN/8xyKUj0IaEq3WWO/+mnWq4Rbvq84kTTM1XEEt g05w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v22si11309995ejj.27.2020.10.11.23.13.06; Sun, 11 Oct 2020 23:13:06 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727394AbgJLGNF (ORCPT + 6 others); Mon, 12 Oct 2020 02:13:05 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33588 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727255AbgJLGMu (ORCPT ); Mon, 12 Oct 2020 02:12:50 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id ECE7F3E397944D9E8192; Mon, 12 Oct 2020 14:12:45 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:36 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 02/10] ARM: dts: hisilicon: fix errors detected by pl011.yaml Date: Mon, 12 Oct 2020 14:12:17 +0800 Message-ID: <20201012061225.1597-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. Change node name to match '^serial(@[0-9a-f,]+)*$' 2. Change clock-names to "uartclk", "apb_pclk". Both of them use the same clock. 3. Change pinctrl-names to "default", "sleep". Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hi3519.dtsi | 20 ++++++++++---------- arch/arm/boot/dts/hi3620-hi4511.dts | 20 ++++++++++---------- arch/arm/boot/dts/hi3620.dtsi | 30 +++++++++++++++--------------- arch/arm/boot/dts/hisi-x5hd2.dtsi | 30 +++++++++++++++--------------- 4 files changed, 50 insertions(+), 50 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hi3519.dtsi b/arch/arm/boot/dts/hi3519.dtsi index 410409a0ed66251..630753c0d704427 100644 --- a/arch/arm/boot/dts/hi3519.dtsi +++ b/arch/arm/boot/dts/hi3519.dtsi @@ -52,8 +52,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x12100000 0x1000>; interrupts = ; - clocks = <&crg HI3519_UART0_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_UART0_CLK>, <&crg HI3519_UART0_CLK>; + clock-names = "uartclk", "apb_pclk"; status = "disable"; }; @@ -61,8 +61,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x12101000 0x1000>; interrupts = ; - clocks = <&crg HI3519_UART1_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_UART1_CLK>, <&crg HI3519_UART1_CLK>; + clock-names = "uartclk", "apb_pclk"; status = "disable"; }; @@ -70,8 +70,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x12102000 0x1000>; interrupts = ; - clocks = <&crg HI3519_UART2_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_UART2_CLK>, <&crg HI3519_UART2_CLK>; + clock-names = "uartclk", "apb_pclk"; status = "disable"; }; @@ -79,8 +79,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x12103000 0x1000>; interrupts = ; - clocks = <&crg HI3519_UART3_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_UART3_CLK>, <&crg HI3519_UART3_CLK>; + clock-names = "uartclk", "apb_pclk"; status = "disable"; }; @@ -88,8 +88,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x12104000 0x1000>; interrupts = ; - clocks = <&crg HI3519_UART4_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_UART4_CLK>, <&crg HI3519_UART4_CLK>; + clock-names = "uartclk", "apb_pclk"; status = "disable"; }; diff --git a/arch/arm/boot/dts/hi3620-hi4511.dts b/arch/arm/boot/dts/hi3620-hi4511.dts index 8c703c3f2fe09b7..1c62bdcca647a9a 100644 --- a/arch/arm/boot/dts/hi3620-hi4511.dts +++ b/arch/arm/boot/dts/hi3620-hi4511.dts @@ -27,36 +27,36 @@ status = "ok"; }; - uart0: uart@b00000 { /* console */ - pinctrl-names = "default", "idle"; + uart0: serial@b00000 { /* console */ + pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>; pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>; status = "ok"; }; - uart1: uart@b01000 { /* modem */ - pinctrl-names = "default", "idle"; + uart1: serial@b01000 { /* modem */ + pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>; pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>; status = "ok"; }; - uart2: uart@b02000 { /* audience */ - pinctrl-names = "default", "idle"; + uart2: serial@b02000 { /* audience */ + pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>; pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>; status = "ok"; }; - uart3: uart@b03000 { - pinctrl-names = "default", "idle"; + uart3: serial@b03000 { + pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>; pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>; status = "ok"; }; - uart4: uart@b04000 { - pinctrl-names = "default", "idle"; + uart4: serial@b04000 { + pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>; pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>; status = "ok"; diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi index f683440ee5694b4..d41378391e4cc36 100644 --- a/arch/arm/boot/dts/hi3620.dtsi +++ b/arch/arm/boot/dts/hi3620.dtsi @@ -172,48 +172,48 @@ interrupts = <1 13 0xf01>; }; - uart0: uart@b00000 { + uart0: serial@b00000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb00000 0x1000>; interrupts = <0 20 4>; - clocks = <&clock HI3620_UARTCLK0>; - clock-names = "apb_pclk"; + clocks = <&clock HI3620_UARTCLK0>, <&clock HI3620_UARTCLK0>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart1: uart@b01000 { + uart1: serial@b01000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb01000 0x1000>; interrupts = <0 21 4>; - clocks = <&clock HI3620_UARTCLK1>; - clock-names = "apb_pclk"; + clocks = <&clock HI3620_UARTCLK1>, <&clock HI3620_UARTCLK1>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart2: uart@b02000 { + uart2: serial@b02000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb02000 0x1000>; interrupts = <0 22 4>; - clocks = <&clock HI3620_UARTCLK2>; - clock-names = "apb_pclk"; + clocks = <&clock HI3620_UARTCLK2>, <&clock HI3620_UARTCLK2>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart3: uart@b03000 { + uart3: serial@b03000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb03000 0x1000>; interrupts = <0 23 4>; - clocks = <&clock HI3620_UARTCLK3>; - clock-names = "apb_pclk"; + clocks = <&clock HI3620_UARTCLK3>, <&clock HI3620_UARTCLK3>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart4: uart@b04000 { + uart4: serial@b04000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb04000 0x1000>; interrupts = <0 24 4>; - clocks = <&clock HI3620_UARTCLK4>; - clock-names = "apb_pclk"; + clocks = <&clock HI3620_UARTCLK4>, <&clock HI3620_UARTCLK4>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index e2dbf1d8a67bae2..f645487402f6e86 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -86,48 +86,48 @@ status = "disabled"; }; - uart0: uart@b00000 { + uart0: serial@b00000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00b00000 0x1000>; interrupts = <0 49 4>; - clocks = <&clock HIX5HD2_FIXED_83M>; - clock-names = "apb_pclk"; + clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart1: uart@6000 { + uart1: serial@6000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00006000 0x1000>; interrupts = <0 50 4>; - clocks = <&clock HIX5HD2_FIXED_83M>; - clock-names = "apb_pclk"; + clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart2: uart@b02000 { + uart2: serial@b02000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00b02000 0x1000>; interrupts = <0 51 4>; - clocks = <&clock HIX5HD2_FIXED_83M>; - clock-names = "apb_pclk"; + clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart3: uart@b03000 { + uart3: serial@b03000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00b03000 0x1000>; interrupts = <0 52 4>; - clocks = <&clock HIX5HD2_FIXED_83M>; - clock-names = "apb_pclk"; + clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart4: uart@b04000 { + uart4: serial@b04000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb04000 0x1000>; interrupts = <0 53 4>; - clocks = <&clock HIX5HD2_FIXED_83M>; - clock-names = "apb_pclk"; + clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; From patchwork Mon Oct 12 06:12:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317621 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332484ilm; Sun, 11 Oct 2020 23:13:07 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzo5s36Q0QUXlRx0kEKTlNeYr9VBrnB8kM/70nmzZb+o+feGTA+sF5ba2u4ihACR+qGvhb3 X-Received: by 2002:a17:906:a387:: with SMTP id k7mr28256354ejz.167.1602483187196; Sun, 11 Oct 2020 23:13:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483187; cv=none; d=google.com; s=arc-20160816; b=llodlHeHuBoOpJ36OFnzwdBB4TPVcFp8IF8ZryB7jaKua56qptjJy37n8VBcyiI3dw FZtTwrmI53Hnr94/yKw+P+DgDnCv3BFWrbZ05uOln8DKsjeCeO2CaRGs3Dp6kZrEssx9 +KP9/1LD/pDJ7rMSXph4vFqGuMiBneMA585/4SRtdgBeM6jWVVIySJRdXGkrA/v7xnQg 4qlWc2ce+zkSK/5vemSmZR23sPUOUS0cxYPqS0lc45S7eCEsr9bw7OcAzDG5GtL/8UX6 PCcBDJklI7llPvlqUj2HDULOOhvFnTy/+kGXucqFDmMLMDDhWaskVh621/tEQ7LqgLor iX/g== ARC-Message-Signature: i=1; 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[23.128.96.18]) by mx.google.com with ESMTP id v22si11309995ejj.27.2020.10.11.23.13.07; Sun, 11 Oct 2020 23:13:07 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727266AbgJLGNF (ORCPT + 6 others); Mon, 12 Oct 2020 02:13:05 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33586 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727246AbgJLGMu (ORCPT ); Mon, 12 Oct 2020 02:12:50 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id F2C96E442C324F7410CA; Mon, 12 Oct 2020 14:12:45 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:37 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 03/10] ARM: dts: hisilicon: fix errors detected by usb yaml Date: Mon, 12 Oct 2020 14:12:18 +0800 Message-ID: <20201012061225.1597-4-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. Change node name to match '^usb(@.*)?' These errrors are detected by generic-ehci.yaml and generic-ohci.yaml. Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hisi-x5hd2.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index f645487402f6e86..0c1708945813346 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -453,14 +453,14 @@ status = "disabled"; }; - usb0: ehci@1890000 { + usb0: usb@1890000 { compatible = "generic-ehci"; reg = <0x1890000 0x1000>; interrupts = <0 66 4>; clocks = <&clock HIX5HD2_USB_CLK>; }; - usb1: ohci@1880000 { + usb1: usb@1880000 { compatible = "generic-ohci"; reg = <0x1880000 0x1000>; interrupts = <0 67 4>; From patchwork Mon Oct 12 06:12:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317625 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332715ilm; Sun, 11 Oct 2020 23:13:26 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy8ZzWCBrjSxj1aRrd6u3SeTCSbduDo2tHpjkXnltrFOaicD3mF3SiBHtn2Uo0udxgJQyjf X-Received: by 2002:a17:906:f90a:: with SMTP id lc10mr27328950ejb.272.1602483206422; Sun, 11 Oct 2020 23:13:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483206; cv=none; d=google.com; s=arc-20160816; b=tlixZoD1riLo8v9ji9KE4HU4+Uufsgz55aKElQ6zhze6raHeRWO0lbesyBcFdgVWPF 6RvgNdc2JcN3OkE3bg3zcQpwp2i6gsIxR1WudupuXNEI9X4zozzoO8LuRdDMu5BrzQtX 20XkqN8LRGw2rT1fVKk6NsLU/NUQ02URW8zSSTltJ8unG+WBRgj/acxCg9lNKsC8WocJ dfnTJsXmFL9t1ikt5vUGOtVgCzVxkIPXs2w/TqqoMuxZcYFP2F5/y98iL2O1bf6DLbQm t+Lk6wasndXOjr8/dKWaBsrBCsMZ0rfVrDvhGEeCFtYRHYISxUuG3bSWi+q75YMcE5tg E//g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=zqXuWNgQRi/FU1PUiuArd791UEsCUrP466r8pv8y85c=; b=MA/4WLOIC/VLSPPUvxqDSdERT/WPdnCKp6rCYs5mn0jnNkZrQ8+n4wS1xPXpPvS3Qv 26xuqy9+2KlrsgbSkr9WXLx+ZXjH2SmS23btY3gBKRbaqZtffAVss4bqAu0n5V6hLIP9 t+eg8B0DlRZQv78WrlcQsKX1NkD9DEVWcE167QJh/z82IgPnYymnX1TEjBlEO+lE5aME mUqArkVs73GUPHI//nGJhcKf/q9M1ghhX186HWAeAZ95GaTpYQGGSAWw3kA7pPehY44e W5HELeavZ9kt1hGLX5n8eeWUM3/2EGpJ3Q87pjW0fdR4wDbGEZCg/waXTJIYP/1jrhVZ JWXw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Mon, 12 Oct 2020 14:12:37 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 04/10] ARM: dts: hisilicon: fix errors detected by simple-bus.yaml Date: Mon, 12 Oct 2020 14:12:19 +0800 Message-ID: <20201012061225.1597-5-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Change bus node name from "amba" to "amba-bus" to match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hi3620-hi4511.dts | 2 +- arch/arm/boot/dts/hi3620.dtsi | 2 +- arch/arm/boot/dts/hip01.dtsi | 2 +- arch/arm/boot/dts/hisi-x5hd2.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hi3620-hi4511.dts b/arch/arm/boot/dts/hi3620-hi4511.dts index 1c62bdcca647a9a..29eedc7fef9861e 100644 --- a/arch/arm/boot/dts/hi3620-hi4511.dts +++ b/arch/arm/boot/dts/hi3620-hi4511.dts @@ -22,7 +22,7 @@ reg = <0x40000000 0x20000000>; }; - amba { + amba-bus { dual_timer0: dual_timer@800000 { status = "ok"; }; diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi index d41378391e4cc36..905900bf3e82040 100644 --- a/arch/arm/boot/dts/hi3620.dtsi +++ b/arch/arm/boot/dts/hi3620.dtsi @@ -63,7 +63,7 @@ }; }; - amba { + amba-bus { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/hip01.dtsi b/arch/arm/boot/dts/hip01.dtsi index fd09e6d9309c755..2a796360539002b 100644 --- a/arch/arm/boot/dts/hip01.dtsi +++ b/arch/arm/boot/dts/hip01.dtsi @@ -35,7 +35,7 @@ interrupt-parent = <&gic>; ranges = <0 0x10000000 0x20000000>; - amba { + amba-bus { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index 0c1708945813346..8fdfde492919407 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -30,7 +30,7 @@ interrupt-parent = <&gic>; ranges = <0 0xf8000000 0x8000000>; - amba { + amba-bus { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; From patchwork Mon Oct 12 06:12:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317618 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332471ilm; Sun, 11 Oct 2020 23:13:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxJz/LRbR0s5H+Wgo26F9wTwUyNKmWTO40FnRZnSe9CmHW42A5WjVMuVjbzyNkQIv+xW0lQ X-Received: by 2002:a17:906:4dc3:: with SMTP id f3mr27527586ejw.50.1602483186099; Sun, 11 Oct 2020 23:13:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483186; cv=none; d=google.com; s=arc-20160816; b=DC5zvaaF0lyyyOQr+OyUNme/exRXB0D9GoXcDaVyvcqdDrXOgeJXuznU7wSVtqRKhL 0SRf/K6aADelXzAH5qfx9qjW4kWmGPGiPQ4uZPHppHZ7i5EI4OpnIUbfiNPSKnVRWJVp S6xblA5BzEdFd4fEvRCMcD4d5jaycesTZRsaF8zpgAk7ZenJHgVQF0WYZaUrWO6YXlrM aRByx/4NEEq3ZWhWnBl9O1tsA5DSC6OmxcoW2LXMUCYrI0RMbFIGCwL6pyHOC1N59XGy tV0I5roJ5NywX2cfVQIHomK3W4t5LxCSPLWwkbRpfYVTaJ+PJPtk+7pz+wDXaX6ahcg5 VtVg== ARC-Message-Signature: i=1; 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[23.128.96.18]) by mx.google.com with ESMTP id v22si11309995ejj.27.2020.10.11.23.13.05; Sun, 11 Oct 2020 23:13:06 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727349AbgJLGM7 (ORCPT + 6 others); Mon, 12 Oct 2020 02:12:59 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33554 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727198AbgJLGMs (ORCPT ); Mon, 12 Oct 2020 02:12:48 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id CBD91FCA812FABA8556E; Mon, 12 Oct 2020 14:12:45 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:37 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 05/10] ARM: dts: hisilicon: fix errors detected by root-node.yaml Date: Mon, 12 Oct 2020 14:12:20 +0800 Message-ID: <20201012061225.1597-6-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Make the momory node name match the regex "^memory(@[0-9a-f]+)?$" which is described in memory.yaml. Otherwise, it will be treated as root node, and misreported by root-node.yaml. Errors misreported by root-node.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hi3519-demb.dts | 2 +- arch/arm/boot/dts/hi3620-hi4511.dts | 2 +- arch/arm/boot/dts/hip01-ca9x2.dts | 2 +- arch/arm/boot/dts/hisi-x5hd2-dkb.dts | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hi3519-demb.dts b/arch/arm/boot/dts/hi3519-demb.dts index 64f8ed126931099..f473fa22e9ce56a 100644 --- a/arch/arm/boot/dts/hi3519-demb.dts +++ b/arch/arm/boot/dts/hi3519-demb.dts @@ -14,7 +14,7 @@ serial0 = &uart0; }; - memory { + memory@80000000 { device_type = "memory"; reg = <0x80000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/hi3620-hi4511.dts b/arch/arm/boot/dts/hi3620-hi4511.dts index 29eedc7fef9861e..ce356c469e1e13e 100644 --- a/arch/arm/boot/dts/hi3620-hi4511.dts +++ b/arch/arm/boot/dts/hi3620-hi4511.dts @@ -17,7 +17,7 @@ stdout-path = "serial0:115200n8"; }; - memory { + memory@40000000 { device_type = "memory"; reg = <0x40000000 0x20000000>; }; diff --git a/arch/arm/boot/dts/hip01-ca9x2.dts b/arch/arm/boot/dts/hip01-ca9x2.dts index f05e74eacfe0bf2..031476304d94614 100644 --- a/arch/arm/boot/dts/hip01-ca9x2.dts +++ b/arch/arm/boot/dts/hip01-ca9x2.dts @@ -37,7 +37,7 @@ }; }; - memory { + memory@80000000 { device_type = "memory"; reg = <0x80000000 0x80000000>; }; diff --git a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts index d55e9cd3b12b420..22b122d3f514e43 100644 --- a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts +++ b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts @@ -35,7 +35,7 @@ }; }; - memory { + memory@0 { device_type = "memory"; reg = <0x00000000 0x80000000>; }; From patchwork Mon Oct 12 06:12:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317619 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332476ilm; Sun, 11 Oct 2020 23:13:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwJWOYCowfvP374J9CrLrMSphjQMHroPcFMS+sw0/5tTnpF+jgPaRdq8JmNA2oG2Z7vn9gN X-Received: by 2002:a50:ccc4:: with SMTP id b4mr12233611edj.250.1602483186487; Sun, 11 Oct 2020 23:13:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483186; cv=none; d=google.com; s=arc-20160816; b=CqTAnPg8Sx0gBJgrtmN0izEC5va1++1gJOyZ8mlUfvOWSuC/RMs2cquLiCPHuGauuA qiFggSExKzXhUxWbs4o+cl4xuwmLWfnPS65VZQt8MrEcOFIdWCZ0ZucQCOF+zaVCJ8eZ 0JZc9+WdCMtQYpU5f0tZ9+kByTb7qxNiCQRrME2EivG+Ea2m8urHnj5UXmY0sZd9oHeg bmcEfYFsDnYsgD9qRIfC92aGMYuqbibxtSU01mZOzrW5e4hThJTL/XQLYUXodMwxwdXr Vd6NMbYiarhcyxSURG+oPnycl+ha+BO8o0oAHbdpShgzEaCwFmZ3ISAb8tApSPyAYjbe 0tjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=oTpkwLcvg2MslX3qIPvmxWLSSX3QL1BpCD70oo8wIJY=; b=fdTtQvRt40L5oz7mn89UPSsivsK8PnKQ4Zel9/FSfsw0HiP5iTX1P34DOM9w+abPl1 JqghG5aZD6WYTt3/a1MtqPfU9KIAo+RfBQh8ByEVx0NpExVCDxoTZHhOOK0b2PJMXnTj x0DuqPdDluvsH+yoqc8GBEeOyUG9Cbscuf57TH3lytnjy2ZhOR8kROK9jEggbAVdXdXI kXcH2pnF8KdtS50ZkpB8h5TARPy136hPly3/VtwthJEGdDst6tbCthYNqX1VzGj1UHSV +7uwUYhcg4mVOc///vvql2F1uqoZT2oWdc1Hc/YwmFCPG7yef3pgaOh4sN3fDdlsvkqk +SsA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v22si11309995ejj.27.2020.10.11.23.13.06; Sun, 11 Oct 2020 23:13:06 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727389AbgJLGNE (ORCPT + 6 others); Mon, 12 Oct 2020 02:13:04 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33584 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727260AbgJLGMv (ORCPT ); Mon, 12 Oct 2020 02:12:51 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id E812157BB096393EC4E3; Mon, 12 Oct 2020 14:12:45 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:38 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 06/10] ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml Date: Mon, 12 Oct 2020 14:12:21 +0800 Message-ID: <20201012061225.1597-7-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Look at the clock-names schema defined in synopsys-dw-mshc.yaml: clock-names: items: - const: biu - const: ciu The "biu" needs to be placed before the "ciu". Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hisi-x5hd2.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index 8fdfde492919407..9a513893758bf89 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -423,7 +423,7 @@ interrupts = <0 35 4>; clocks = <&clock HIX5HD2_MMC_CIU_RST>, <&clock HIX5HD2_MMC_BIU_CLK>; - clock-names = "ciu", "biu"; + clock-names = "biu", "ciu"; }; sd: mmc@1820000 { @@ -432,7 +432,7 @@ interrupts = <0 34 4>; clocks = <&clock HIX5HD2_SD_CIU_RST>, <&clock HIX5HD2_SD_BIU_CLK>; - clock-names = "ciu","biu"; + clock-names = "biu", "ciu"; }; gmac0: ethernet@1840000 { From patchwork Mon Oct 12 06:12:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317622 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332688ilm; Sun, 11 Oct 2020 23:13:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzvxemET5VYiTMkHtxsxCQ3WFfAuiJV6tZefSEHq/xBZ5g4o1SCzRzugMUbpHPY1L/MEW/9 X-Received: by 2002:a17:906:b291:: with SMTP id q17mr26356123ejz.455.1602483204065; Sun, 11 Oct 2020 23:13:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483204; cv=none; d=google.com; s=arc-20160816; b=T0134BXWO9lUzpCrq+BIdWjUECZSaIjuBKCpSAipj7Z0ftqNpc8Gphsqh8MmiWKEjC CLiIzdy6Op63/DAzcrx0SDaDuWai12+pM3R4v8sA0Y8WOUUFe5Cc4xdxC5owDTNU+Lez rnvJMIAGD7Tdt2IBR7ZfJsz2WdNo/G769hqjjjH/2FWiSuneBbjuxmuZvLFU38mJAOEQ 95OTS/LWJZTzslbHF6+87aeD6RSKH8SMLICyLt4FeCBRpZzz8sMHfw8NiM5O8uoEk5vF FLQfD9MtO2UdgXHjZVpVqdbiaGt27XlxXBn52GbVEei1BIHp2P7qVCF5drYQSJZhv87/ y6Eg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=ptC1ntDbpeQBl4a1u0ddxBl/cS1YUfD8vz4A+pP8kOY=; b=G0XLMt/T/1qXPkHDSvwwvomwz6qykqvY3FG9diX2339ilcQ7iimMEJ1AjWop368+9A gSegBA4PUAnRYoZEq1W5iiZsZ7Rc79XS1JaBMG9uExaAV9JOehqxEx6f2UKPyRKdtMxj wLlWAenAtHkB2vniui8TPSvxfqFCexNqGPKW/HLxsfvDCcTRTuE1cV9lADjlY6mApXLX zywWs6nrhFA2NrvMD6YHjyb2803Dxs+bAKqSyZzeJenO5QEZqB3M8jy8YsNK22JUNFA3 k4r2OIggjGSr0vjSKKuMmTpTF8a1jiOqA43NmNo8pIIM+/iLvregA596KuYSdUkynCL/ L0cw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id pg3si13843761ejb.685.2020.10.11.23.13.23; Sun, 11 Oct 2020 23:13:24 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727418AbgJLGNG (ORCPT + 6 others); Mon, 12 Oct 2020 02:13:06 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33580 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727241AbgJLGMt (ORCPT ); Mon, 12 Oct 2020 02:12:49 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id D1793321CB20E1F84D70; Mon, 12 Oct 2020 14:12:45 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:39 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 07/10] ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml Date: Mon, 12 Oct 2020 14:12:22 +0800 Message-ID: <20201012061225.1597-8-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. Change clock-names to "sspclk", "apb_pclk". Both of them use the same clock. Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hi3519.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hi3519.dtsi b/arch/arm/boot/dts/hi3519.dtsi index 630753c0d704427..c524c854d319243 100644 --- a/arch/arm/boot/dts/hi3519.dtsi +++ b/arch/arm/boot/dts/hi3519.dtsi @@ -127,8 +127,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12120000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI0_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI0_CLK>, <&crg HI3519_SPI0_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -139,8 +139,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12121000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI1_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI1_CLK>, <&crg HI3519_SPI1_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -151,8 +151,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12122000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI2_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI2_CLK>, <&crg HI3519_SPI2_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; From patchwork Mon Oct 12 06:12:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317617 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332426ilm; Sun, 11 Oct 2020 23:12:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJydIkwN++ENKtDfCz8HetDrIZV9hJ1y8GffEOvUy+zftSQmMsnvGTz0RO7YKxHR0FchvwZq X-Received: by 2002:a17:906:7e0e:: with SMTP id e14mr26234194ejr.238.1602483179339; Sun, 11 Oct 2020 23:12:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483179; cv=none; d=google.com; s=arc-20160816; b=KUxyCu4hWFjWeCKq2bll89eQpN130jen7OnPmD+tjOWy2qLQEtPgrPjqAst12el9HW IuHavauJEZmfiumWJZfOig5ivGfPUyDVstPHpPwLfdg79rcJbfGU+qn0sOO8NlULYEFI d8z9p1Y9KLZJ0IzFnCvMcF0Rali4BX5/ZNwPGsCnP4VkN7EdHa3dOO3zee1yiQHqCYDW dga0e4BBQGYPeEwtTLzQ0lIm6t8enoYMndKJVHPquDP/UvlvU6MQLMShjEZm2WG9dkLv NpwhGkXBa/O0ohOA2XrPMrDT/YGhcOKxrcGLVOjSkomj9HUJxY0gBrTw5ogLO6+wsaUu mkoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=lqwLpvYlKVM/z7WFPK1JDQiV5MwiSJ8Idw2odqFHiys=; b=1GTwTVF6KfVRrVlCYpiM0+I82bKx3hZB9znM2/z0vV3RluIU9IOn6Lx+iC3+H9n5v1 FvUMTxEVdGTlowQaKtek8n1M4Jkd/t0SGHx4f62MFzMRu9EGWbqmqRcd4Ecdl/RcoHXD YNMTZSHEkx9SzVK8fo4OZJVHxJpd97xGwQO4kDwOfxz1VqK0RfU+9lJRjKoZ7GcSEgJf O/0kTPV6NzYDRmkYxa+Pa3Hf91vxpv4u5C9qs5so2BeJNNpd2Ajxg637AUfNKPSaEAxK huNVPSJs2zdpy79eXX6+RPxNV2VxIC8p+xAl/tq+icyoo1sXXrzwGIncjCrAXydmuFP7 q2VA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b15si11856375ejq.260.2020.10.11.23.12.59; Sun, 11 Oct 2020 23:12:59 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727243AbgJLGMs (ORCPT + 6 others); Mon, 12 Oct 2020 02:12:48 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33560 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727202AbgJLGMs (ORCPT ); Mon, 12 Oct 2020 02:12:48 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id B3D7CDA4379E819F3AD6; Mon, 12 Oct 2020 14:12:45 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:39 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 08/10] ARM: dts: hisilicon: fix errors detected by syscon.yaml Date: Mon, 12 Oct 2020 14:12:23 +0800 Message-ID: <20201012061225.1597-9-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The DT binding for system controller is not allowed to contain only the compatible string "syscon", the Hisilicon peripheral subsystem controller should add compatible string "hisilicon,peri-subctrl". Otherwise, the error "compatible: ['syscon'] is too short" will be reported. Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hisi-x5hd2.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index 9a513893758bf89..97211385dc89cbf 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -468,7 +468,7 @@ }; peripheral_ctrl: syscon@a20000 { - compatible = "syscon"; + compatible = "hisilicon,peri-subctrl", "syscon"; reg = <0xa20000 0x1000>; }; From patchwork Mon Oct 12 06:12:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317616 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332386ilm; Sun, 11 Oct 2020 23:12:53 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw+nZ5QYp9gr2ss921fx3+Q5LdVfXgZwWj8kxQL4RWwP5LkGv9pi9EHlHJdqag48Jrqjk3b X-Received: by 2002:a50:d94d:: with SMTP id u13mr12117998edj.365.1602483172987; Sun, 11 Oct 2020 23:12:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483172; cv=none; d=google.com; s=arc-20160816; b=M2g80QPM1j4R0vleJLR5E3h99qrpW3F0QcJiI0SedLzpPU9a1M/gnjGopYkGVCI0oF 3x+waNlkZnCSoT1nMoq6Gt44DwNPejpBj1yYglGxX8GMQjIKJvB68Wbwknw6iFTKU4uP IQjQrp5/wOdW0yFk/M/qGTpDWStw3DqVe6hRk68Dm46m+iJJbtXmgVd0Jp8/5EI6oe6Q Y1J7G83MHnS3Xw+Hxj4hPJVd8VojcXasHERm3PAJlAl+IRVjzIkxhozmlQZP7p7HkpK/ 4aybpU3aXxgw9Q7v2XI9dvBd9bjXQk7514Bv9nFc4R/u/eYciozloAn4BfjRqzYmzBp/ J93A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=H5MVhmYTpO84p0rj20WgdInCQHLhcWBMDFy+LyVseag=; b=jPeKhY54Tt4d1M/ArMa7S5UhM7Yak8+cu/zBC3oIcXlDUbH8WpyOVTYfkVfIopabOR lZZcOjOLcBPfhtZXJmMkNq4/puR/iXYud5N8PUKtAhz7FVhsmjJxWFYE/flMeLttUcdI IaxAmWUxJrhM2zAflShQ9wbf8KcNFtpeBflp7etbWssk9XkHyoVbwfLyjyC1PWr/NcPU B81/XXV6Xo4av0QYGwtambOnOJiueC2LeeDV2SGF36t1//9IEnDi7BV/coCx/Hq68jlg dtiMSzJ3oIWqNNxtjzMFXUaWK2yCet7ka7XNTlbhE05AY9LQe/56dEZXYRvXncUSmtec Z1DA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b15si11856375ejq.260.2020.10.11.23.12.52; Sun, 11 Oct 2020 23:12:52 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727263AbgJLGMt (ORCPT + 6 others); Mon, 12 Oct 2020 02:12:49 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33556 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727214AbgJLGMs (ORCPT ); Mon, 12 Oct 2020 02:12:48 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id C60512300DE390C4CF61; Mon, 12 Oct 2020 14:12:45 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:40 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 09/10] dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml Date: Mon, 12 Oct 2020 14:12:24 +0800 Message-ID: <20201012061225.1597-10-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add properties: #reset-cells, #address-cells, #size-cells and ranges. Due to the Hisilicon system controller node may contains child nodes, change the value of "additionalProperties" from "false" to "type: object". The examples have also been updated. Signed-off-by: Zhen Lei --- .../bindings/arm/hisilicon/controller/sysctrl.yaml | 28 +++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) -- 1.8.3 diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml index 449140f89ddbc3b..5a53d433b6f0891 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml @@ -71,21 +71,43 @@ properties: '#clock-cells': const: 1 + '#reset-cells': + const: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + ranges: true + required: - compatible - reg -additionalProperties: false +additionalProperties: + type: object examples: - | /* Hisilicon system controller */ - system-controller@fc802000 { + system-controller@802000 { compatible = "hisilicon,sysctrl", "syscon"; - reg = <0xfc802000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x802000 0x1000>; + reg = <0x802000 0x1000>; + smp-offset = <0x31c>; resume-offset = <0x308>; reboot-offset = <0x4>; + + clock: clock@0 { + compatible = "hisilicon,hi3620-clock"; + reg = <0 0x10000>; + #clock-cells = <1>; + }; }; /* HiP01 system controller */ From patchwork Mon Oct 12 06:12:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317623 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332698ilm; Sun, 11 Oct 2020 23:13:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzeZe3S6wg+eZT8mDzRACyUkvhfHqhrOlX7L6ggdtoLp/CXF29+wCHNSHmHPLgehvYiXbf0 X-Received: by 2002:a50:d84f:: with SMTP id v15mr12058834edj.61.1602483204883; Sun, 11 Oct 2020 23:13:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483204; cv=none; d=google.com; s=arc-20160816; b=yNS6CnIivQSn0O2wzWwvrpGqan6kB8THtesVcvzbFJU0BCbzpHX6EU8ztiOnZuzf/U KKxizKKzz7gyZNoKi1j/U3OpH9swHJBu7B78KfFSjpmUDbL7vXsSyLikxVvMYyXcwRY5 4LYHFvLE92wk/c5yQRpwMVWFVV0+dStKkg8iw9JCneV9Swc1o5qBfvejqjtqXbMGiEv2 nmFDqkWHut9VP8EFWooNtHdddEMIG3YCWWz0js9jHbd8dEGBWc5nwHEEL8+oxn6Cris5 9Qk3tOKJ1WpOj89vm6rRciYlYB/EADiVVDz/Szk2++padT5GWgi4bzWQ9HdFKl+XDdte ghQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=kL4onZ79jRTGY1zSp3AoIXTyK/wHoyJXcM88vYmzjTA=; b=Te8AcExFKHROaB+vBKarCuv0gTUNwcaaSpAnhFwmgYjoluIeKPNycgRl6gkjfhtg9P 5xxIjDDiBSE4wmgBdPYoys8pQ8/BP5Orvyz/cHgyHaoc4TfaIqg1d/HTJ4uaqbBUCSPi +CMyY2p/6vAZse6GpYXONbe2xZi8zjHyG9tgY3DA/UaxY8YRwu/xfAFTmlPjY1ViUD95 B5Tfqw6JxgSc6mugnmS2yQRR+tvxZTGLFxQYzGEuVq9ZYOcsFHWA8qS1GbP//LTiMXTg OCfDSRMtkhCcnrfVgoAiTACV4uZkEW9zbN9cP38FCzkBobZ32E1XwfDClTXrc1711ZOA KxQw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id pg3si13843761ejb.685.2020.10.11.23.13.24; Sun, 11 Oct 2020 23:13:24 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727386AbgJLGNE (ORCPT + 6 others); Mon, 12 Oct 2020 02:13:04 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:45554 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727337AbgJLGM5 (ORCPT ); Mon, 12 Oct 2020 02:12:57 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id C3802C80DC9FBB15F377; Mon, 12 Oct 2020 14:12:50 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:40 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 10/10] dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml Date: Mon, 12 Oct 2020 14:12:25 +0800 Message-ID: <20201012061225.1597-11-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add properties: #address-cells, #size-cells and ranges. Due to the Hisilicon CPU controller node may contains child nodes, change the value of "additionalProperties" from "false" to "type: object". The corresponding examples are also added. Signed-off-by: Zhen Lei --- .../bindings/arm/hisilicon/controller/cpuctrl.yaml | 27 +++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) -- 1.8.3 diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml index f6a314db3a59416..528dad4cde3cd19 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml @@ -21,9 +21,34 @@ properties: reg: maxItems: 1 + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + required: - compatible - reg -additionalProperties: false +additionalProperties: + type: object + +examples: + - | + cpuctrl@a22000 { + compatible = "hisilicon,cpuctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x00a22000 0x2000>; + ranges = <0 0x00a22000 0x2000>; + + clock: clock@0 { + compatible = "hisilicon,hix5hd2-clock"; + reg = <0 0x2000>; + #clock-cells = <1>; + }; + }; ...