From patchwork Wed Dec 9 02:45:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 340353 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp4228666jai; Tue, 8 Dec 2020 18:46:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJzv7S9WffCDubyfdQSK/po25kXIr7sNokjdARWR993NvQY793h1O/MUgaJDAK77b8Z0KHpW X-Received: by 2002:a17:906:3508:: with SMTP id r8mr273645eja.137.1607482008593; Tue, 08 Dec 2020 18:46:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607482008; cv=none; d=google.com; s=arc-20160816; b=sK5xzKvpXxVPhq4QrGRqRx3YRsS78e36dOWfqmqyCIYoutIfr21BjhOC50l05+zHq+ /A2dWIVB80sCbm1LkDyJ6Us+l6Do5DaEp1b795uR5rUoly67Nt43TI/7xSBSvPnOFdsr +pd8oAAbsUvFu7XfFzc2O/HHD7LESzfQc963q7IVmkjwmJd1ExoJjKfPFiqiHmxFj84E +q724odtcT6R1q9fNM+/Z9/fXIkMZ9wf4t4XALf3xafoKqKWHvBlYa4nMKFPpYIa+qM6 89sE35V83W7aftPvcVsKkKRtQqfElpz+h86s2sIBrEwScn3zfRgQF2PxtLwxRy0HEcTN EbXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=H6CXkt7XQRmTS6IAY9O5gfocreD0xWeDQV3rSfuBX9s=; b=K+ElffbFFafwgsBStazdgEl1yNuJLIG/SGDnCRLyfoFfb29UUO+Zt8DLho87Agiu3b NnZQ5vCemUE1VAJAixUyzpdqzWEFzL94aHmpj7jc4N+TtzG9fp9Khgk4FuZPKTA+wACo YMR55NgKp7xN30jGiMW8be/i4TVNtKZGKw+ACSrYpxoc8zibTQAShdGereHAVi0sPQ03 vab1kwVYbBTDqiZuIidq/5OSA9UsOUSKJh07UmvNlDYHvQ2LSb7cGYUBjjGW9NofxUgK xXLJVcb2NCjBXCZbiHDbH8A7gJ4wanGk38mUMOvoriFPar0CuRltR44/+dhEFVvrZDv5 p4Xg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZmQLEKeb; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id k9si107897edv.493.2020.12.08.18.46.48; Tue, 08 Dec 2020 18:46:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZmQLEKeb; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726883AbgLICqr (ORCPT + 15 others); Tue, 8 Dec 2020 21:46:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725871AbgLICqr (ORCPT ); Tue, 8 Dec 2020 21:46:47 -0500 Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23822C0613D6 for ; Tue, 8 Dec 2020 18:46:07 -0800 (PST) Received: by mail-pj1-x1041.google.com with SMTP id o7so86514pjj.2 for ; Tue, 08 Dec 2020 18:46:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=H6CXkt7XQRmTS6IAY9O5gfocreD0xWeDQV3rSfuBX9s=; b=ZmQLEKebxKoEzpOQ5dtdNbqyYMje7zhUcl4A10rmbCj9PLztJjRVGh1NCkZCEkgTUr 5oNf4qFvCFAu7IIyLLNE3a90NlHM8l1HLqSo0pnPLzxKYqj9PxJQ6P41mruqRcVP1HTe kz2enxAdoqoOS3YG3EMdqlh1YwcjjbUqPDRmlKr6bFSkKhGBgHSPfqjWR2N17JliKQkz Bd+gzgzXUQl1rkJRpry3GU/pD9rsBfVCsN1B4hzlxF3k0JHmt1iSRNXgAbQ1+ZVdKAuR uoY7ifPnoawTWlmTn+obZqxsexwBpqVA4qrLOVDv101gD67qBEoIdSvlFPD7QUJ/OZR+ pcdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=H6CXkt7XQRmTS6IAY9O5gfocreD0xWeDQV3rSfuBX9s=; b=s5I4KMPXT3OLW0FNz2GjLDW2LvIPM5yL7wzJvR/2R4hE1monl2DYN8rkYVSPF4fie4 fnTXDiYUGxI0R7dxg7hEp85KLh3UGU8F3YjdloIpLapw4rVAZZu9hvOktc8Y+Pw6r2uL DYDFUCmqDYYGyO2vHq4txytAXG7sk6SffNinUHGmYr4mOxCI+7nXXNEnnzL1pZueqcyR UX7aim0iI/UZrgRvg0W8g9aLU2V5YPGB65jjDwHNAF5ceWgRbPlvhHX9+Lz8d57V2Bfo XdpONdRjal5jCcXwtZ+X4/I0oc0Dvi5oHRqF1h948sysOJOE57OmCV7ZdgOjO6R2dtVe sKDA== X-Gm-Message-State: AOAM531I2MWA4Cr8UM2uaEfPl17PEDiUjnb75f36XtH+UjPxx1kJudB+ ObQIoFPUb8wDbAptnRTcYypC X-Received: by 2002:a17:90a:bb91:: with SMTP id v17mr196846pjr.231.1607481966568; Tue, 08 Dec 2020 18:46:06 -0800 (PST) Received: from localhost.localdomain ([103.59.133.81]) by smtp.gmail.com with ESMTPSA id g34sm155678pgb.33.2020.12.08.18.46.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Dec 2020 18:46:05 -0800 (PST) From: Manivannan Sadhasivam X-Google-Original-From: Manivannan Sadhasivam To: lorenzo.pieralisi@arm.com Cc: agross@kernel.org, bjorn.andersson@linaro.org, svarbanov@mm-sol.com, bhelgaas@google.com, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, mgautam@codeaurora.org, truong@codeaurora.org, Manivannan Sadhasivam , kernel test robot Subject: [RESEND PATCH] PCI: qcom: Fix using uninitialized smmu_sid_base variable Date: Wed, 9 Dec 2020 08:15:55 +0530 Message-Id: <20201209024555.14116-1-mani@kernel.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Manivannan Sadhasivam smmu_sid_base should hold the base of SMMU SID extracted from the first entry of iommu-map. This value will be used to extract the successive SMMU SID values. Fix it by assigning the first SMMU SID base before for loop. Reported-by: kernel test robot Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.25.1 diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 8ba3e6b29196..affa2713bf80 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1297,6 +1297,9 @@ static int qcom_pcie_config_sid_sm8250(struct qcom_pcie *pcie) /* Registers need to be zero out first */ memset_io(bdf_to_sid_base, 0, CRC8_TABLE_SIZE * sizeof(u32)); + /* Extract the SMMU SID base from the first entry of iommu-map */ + smmu_sid_base = map[0].smmu_sid; + /* Look for an available entry to hold the mapping */ for (i = 0; i < nr_map; i++) { u16 bdf_be = cpu_to_be16(map[i].bdf);