From patchwork Thu Dec 10 10:02:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 340974 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5381681jai; Thu, 10 Dec 2020 01:57:00 -0800 (PST) X-Google-Smtp-Source: ABdhPJzw71+rTHjbF9pwDkRzu7bWguDI1fVc0yejmA+g68lw7UDexB2Ao1OBv5MCenjdl2h0JuiW X-Received: by 2002:a17:906:4d47:: with SMTP id b7mr5524892ejv.420.1607594219952; Thu, 10 Dec 2020 01:56:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607594219; cv=none; d=google.com; s=arc-20160816; b=Q9YHQ10EMZAajmWsI+spqad2lxk+bdiVhi0ALZOxusKoHLWF01hZpoNff/RXkiV+R9 3uI4PdqM9EKpi40kcu6aZ9cRR7MXPooJ1WWVBCMxAg4fxYhacdPWlitJOmwqCZvpb4os Zy26LidNQJBsuT/wIKaVYeYTMKSpSdw9SajJqx48eGAT3vWTfsVKZ9lw+kNIR6uJh+MZ 5zLMVAFR8jeQAWzqhM3UJ1ZjtsxQb/XE719+Kvis76d/dMoeoxfQcm3WUrSQyIm+acnu ygpjcS61SIHwEbL+6+J/Yq3QWNd1s0E+4s4OyweOmObjUpOThtKIfkDnb3EApMRNBm6h fQ0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=FcTurwR3UY1mQFez+TFw8NFlAeaWCMFUhGGUVyVnIPk=; b=YF/AWnU1Xu4XudCwllzcMeb8usRwiNCW8mN8YXnOyFZEFYxZK6WO/rgJtXqnKghzv8 1u8vJ+B5nJFir93k3wuTXbXRBVZCuL4dx3WqNO380NvpLXFguwOpqPdJqzAEmB0IFRsB pZCZ3u95VhwSxctPlImbw0AaU8FW89B01ilFxsNQePc6Mv5ul3HaAdvr6lZb29oATcBS 8kWBwQ0pfS/JL68aEYlnaP8V2KfAuxZ+rOjzjTZJWMJmAscm27YI6x/y0aZ6j5WHBOg6 KakW8rdmjr/J2l5Wtmztb2WQ5hdjTDpgmRyrz4VBZ5wB/f5XrTGNhc2rBGLcdoKhWfLR ZN1Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=twbAFaGn; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id 11si2499658edv.53.2020.12.10.01.56.59; Thu, 10 Dec 2020 01:56:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=twbAFaGn; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729296AbgLJJ4w (ORCPT + 15 others); Thu, 10 Dec 2020 04:56:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728680AbgLJJ4g (ORCPT ); Thu, 10 Dec 2020 04:56:36 -0500 Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBBD3C061793 for ; Thu, 10 Dec 2020 01:55:56 -0800 (PST) Received: by mail-wr1-x444.google.com with SMTP id k14so4805607wrn.1 for ; Thu, 10 Dec 2020 01:55:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FcTurwR3UY1mQFez+TFw8NFlAeaWCMFUhGGUVyVnIPk=; b=twbAFaGnEe6Y3ou5PlJcciRESvYfDRMcAQxrCGBMuY+mPmsK5UyJ/TAxUeB/fSwp8N mQpj0ftGb+6aqRFtFN9syZ4ru14IElwGPX8qJySgk+vz2BU/hMhcdb3JrSZb7zOofK18 m507buh1CxEECilGMvh9sMbOA1Kdl1X0piz5Ufx1vSC0wY8fNl+2zJ2D3pL+poVmMRec ODpYy1/OiDyrOxMdtoBOPNoRl0AivJJ8H3dSLOMYmyBgrcD26jIrPa24zW2ikOVxP9+4 9R+QbZemHmJr1q0+yyN7qXf1IWnvdZos5TQK1v8fw3IrsjzyJRrdW/8evedues0hINpu dnCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FcTurwR3UY1mQFez+TFw8NFlAeaWCMFUhGGUVyVnIPk=; b=HypHofWq38GD/IFAxZcHvc2Hs5wWOPN4YwizaOTZ7kwMHYUFMUbt+gkz9bRmnuB72s 3LCO9FCuVnpl76++1O00qLEhd3FxfvgJ9VAxFEhpm3bKw76MNdj8raD20w46VFVGVnYn AMOkPqSyTsiqkr4b07fCzXDvdBG7KX/gD27E20gsZEekG5nLx3oQyb/1SEEzPdvFQNkl 1ys1Y76G5XfTTXj44uvG/mSsPFh10F1hdKz8UetP6RXwtZElFnlJSO2uZNxymRyWLyv4 KL9r69RwkQfydR0w87nTugY4me6LrirUSD6UNLiOO+ZuYTxY8YjPuOxaDTCXs9DPTJau SMJQ== X-Gm-Message-State: AOAM531R9OpiyzAJvVv/JL5VLTQrUbeQLP3aOqPz94kfHlJ+M8bGepKq 86aO5444BTw3ty2R5h87THvC6Oor064BN/QL X-Received: by 2002:a5d:6045:: with SMTP id j5mr172459wrt.223.1607594155715; Thu, 10 Dec 2020 01:55:55 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:4468:1cc2:be0c:233f]) by smtp.gmail.com with ESMTPSA id l16sm9043721wrx.5.2020.12.10.01.55.55 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Dec 2020 01:55:55 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v4 01/10] mhi: Add mhi_controller_initialize helper Date: Thu, 10 Dec 2020 11:02:46 +0100 Message-Id: <1607594575-31590-2-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607594575-31590-1-git-send-email-loic.poulain@linaro.org> References: <1607594575-31590-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This function allows to initialize a mhi_controller structure. Today, it only zeroing the structure. Use this function from mhi_alloc_controller so that any further initialization can be factorized in initalize function. Signed-off-by: Loic Poulain --- drivers/bus/mhi/core/init.c | 7 +++++++ include/linux/mhi.h | 6 ++++++ 2 files changed, 13 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c index 96cde9c..4acad28 100644 --- a/drivers/bus/mhi/core/init.c +++ b/drivers/bus/mhi/core/init.c @@ -1021,11 +1021,18 @@ void mhi_unregister_controller(struct mhi_controller *mhi_cntrl) } EXPORT_SYMBOL_GPL(mhi_unregister_controller); +void mhi_initialize_controller(struct mhi_controller *mhi_cntrl) +{ + memset(mhi_cntrl, 0, sizeof(*mhi_cntrl)); +} +EXPORT_SYMBOL_GPL(mhi_initialize_controller); + struct mhi_controller *mhi_alloc_controller(void) { struct mhi_controller *mhi_cntrl; mhi_cntrl = kzalloc(sizeof(*mhi_cntrl), GFP_KERNEL); + mhi_initialize_controller(mhi_cntrl); return mhi_cntrl; } diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 04cf7f3..2754742 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -537,6 +537,12 @@ struct mhi_driver { #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev) /** + * mhi_initialize_controller - Initialize MHI Controller structure + * @mhi_cntrl: MHI controller structure to initialize + */ +void mhi_initialize_controller(struct mhi_controller *mhi_cntrl); + +/** * mhi_alloc_controller - Allocate the MHI Controller structure * Allocate the mhi_controller structure using zero initialized memory */ From patchwork Thu Dec 10 10:02:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 340979 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5381910jai; Thu, 10 Dec 2020 01:57:28 -0800 (PST) X-Google-Smtp-Source: ABdhPJwvaqgxKMnolIrvF5F88RFv3DHccAh0uND1ipbDf3OMDmLWZ3IIo3i9cTxtZZ/jduAkS/X7 X-Received: by 2002:a05:6402:d08:: with SMTP id eb8mr6023037edb.271.1607594248014; Thu, 10 Dec 2020 01:57:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607594248; cv=none; d=google.com; s=arc-20160816; b=MHnn3gLNwcDaxPWuiq5uJsOFnkcfBtQFnrP1GpxZbcrwzhUHVRI2Gm9SFXs3iIcwfa 3cteqYoDQ7W9oeokO3hEBrwDOPxG1r+WpAoOOgyjO/lHHcq0bPyv0YWfEvGpoU4KvEQM 7jldd18qaJ7YBl9QHI+0uUy0lo7lZ0Ew4EVwvp5KUOI+YdsULUNPWl38U2uJWnMFgf6D RnUUNqgBS/h69oDa3RDmdn098D34OPNrZmIU0zjLYt+/0sFXPECh6DwxEXJF3dGbX7Df D03e3ISEWuEJaS2iG9UTkv40S0zRFw5RSe/7E93A/QLse4LKTrSbxExTLRNrADHXnj3O usvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=pOEXaNJekDpHw1CP3O0Pj76+vI42wYO3Vt7QFcDTgJc=; b=OObtF71YrmWiMMnIlr99+7xBlxxx8wOf6oIuna413OSC4KtskKPtlWyZc+4eGuWliR XqJLI+N8E6bj9XBAYw9yNegyoj4LJgAkxfieNd9y71X4N14a2IsXAO30FpX1B6rMSR05 NjPUY3bggzpywkXbqRIp6G3Lk1psMw++bYC1OkBnBRl92OvQ/VAhSpTeB4/RrfagB7WM up08xb2hTiHi+hEo3Vt2XmXoh63ACuzYCX0sDxC1j8Rfrm3oWFrWsQIrPeba+b3dQLb8 9ZMpb+3RHs4EyzMwbBVuEX6ou9rYQ7QQ5FOdhEdMeyr8pNiGJmyWuI9dLZTF8hVohhOK OspQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pXGA6QhD; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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It can be used to completely restart the device (e.g. in case of unrecoverable MHI error). This is up to the MHI controller driver to determine when this hard reset should be used, and in case of MHI errors, should be used as a reset of last resort (after standard MHI stack reset). This function is prefixed with 'mhi_reg' to highlight that this is a stateless function, the MHI layer do nothing except triggering the reset by writing into the right register, this is up to the caller to ensure right mhi_controller state (e.g. unregister the controller if necessary). Signed-off-by: Loic Poulain --- drivers/bus/mhi/core/main.c | 7 +++++++ include/linux/mhi.h | 7 +++++++ 2 files changed, 14 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c index a353d1e..9f8ce15 100644 --- a/drivers/bus/mhi/core/main.c +++ b/drivers/bus/mhi/core/main.c @@ -142,6 +142,13 @@ enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl) } EXPORT_SYMBOL_GPL(mhi_get_mhi_state); +void mhi_reg_soc_reset(struct mhi_controller *mhi_cntrl) +{ + mhi_write_reg(mhi_cntrl, mhi_cntrl->regs, MHI_SOC_RESET_REQ_OFFSET, + MHI_SOC_RESET_REQ); +} +EXPORT_SYMBOL_GPL(mhi_reg_soc_reset); + int mhi_map_single_no_bb(struct mhi_controller *mhi_cntrl, struct mhi_buf_info *buf_info) { diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 2754742..8b1bf80 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -687,6 +687,13 @@ enum mhi_ee_type mhi_get_exec_env(struct mhi_controller *mhi_cntrl); enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl); /** + * mhi_reg_soc_reset - Trigger a device reset. This can be used as a last resort + * to reset and recover a device. + * @mhi_cntrl: MHI controller + */ +void mhi_reg_soc_reset(struct mhi_controller *mhi_cntrl); + +/** * mhi_device_get - Disable device low power mode * @mhi_dev: Device associated with the channel */ From patchwork Thu Dec 10 10:02:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 340984 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5382242jai; Thu, 10 Dec 2020 01:58:05 -0800 (PST) X-Google-Smtp-Source: ABdhPJxkX89yTlmlyj4TPtlMs4/op/anVm4DB6e9yGfSDi7ap38E0DKy9/1ND6wdKLSLu+xte5v/ X-Received: by 2002:a50:aac8:: with SMTP id r8mr5811296edc.9.1607594285304; Thu, 10 Dec 2020 01:58:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607594285; cv=none; d=google.com; s=arc-20160816; b=a9erU+nfRRIK4bNH10ay2yU7YwDHVRob7IJyfbp4shr2k4lhi9b/DAhLabrgevAZUG QxvOfv4mcTFr9PSAMTOUOV8jjemr2HZVCWeXCxAuw/T315XgxKlU0OxDDPOFXBo3rmA5 6enrcHCScch8+9zXXJx/lOOmvkxgHlY1XfzwG7Ck8owbnNJqJtoF7Cu9QCTiHWlsdqDT 7s/cSWQBJ/cLexY7Ypiudx5s5l28dY3fC3fX+pGKtF6PKSMDI/wZNLX371U67NwDnvEY dbTxY+kY0n3I3VlnQT/4YjmoEM1nsnEAv8in4HjjHnKF8tjuD46AMoNLYOzTLCTBkkdi thrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=u23Upri+mVTKw2vMmpl89dQD9K1UaxJ4Tc+YMYk9PIg=; b=AbzkikDQca3owmFBeDfC7/uKLF3mWEt8t42i5/7jGM4/H+hiRGy9JpbkZiybkRk6U0 hkY7aO4EYeAS3zLrr0gH9CIL8Dbx2p5Rp5HiqQJ4d5GS4qJaEXUqPaypF5l/MfC3Yvd7 IXTABoBsuC96cFyCZqv/9pwPreh93So0C1uu5xw/Vs+DVrh/Jnoc0GqbZ9RGpK6+C0cr 6OIgukxAYKGHx8RXgp1EzUIz/ameanAQr1AqGROKBZLSRIyzVWQ5dnOjooeXVIW+BBbX OA9JfvgOy0YPmdwfd9Efq9ZiJrqPBmpHHz4ohbNQB5a0/gd5gxEYR0ikyl3JtUs++Jwa XB8w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=F+YZszV9; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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That can be prevented by setting a larger number of events (i.e 2 x number of channel ring elements). Tested with FN980m module. Signed-off-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index e3df838..13a7e4f 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -91,7 +91,7 @@ struct mhi_pci_dev_info { #define MHI_EVENT_CONFIG_HW_DATA(ev_ring, ch_num) \ { \ - .num_elements = 128, \ + .num_elements = 256, \ .irq_moderation_ms = 5, \ .irq = (ev_ring) + 1, \ .priority = 1, \ From patchwork Thu Dec 10 10:02:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 340976 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5381817jai; Thu, 10 Dec 2020 01:57:16 -0800 (PST) X-Google-Smtp-Source: ABdhPJxxaORJ862QRlwsplnyfB8VkIz22AjPKf2/P2qy1DxPwc7MvEGZY+/6NeI9elUfTJ79bmgl X-Received: by 2002:a17:906:17d9:: with SMTP id u25mr5822570eje.34.1607594236046; Thu, 10 Dec 2020 01:57:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607594236; cv=none; d=google.com; s=arc-20160816; b=oyfFlNFhAQDKHSyPVykYAGgPW7MRPvmFW10mFapPvVEX5h1wPgFv1BSYWaAYEfVGm5 3xRLhI+OYr+Q3EXFnrY/KJy22lkcUyM15N9a/NCHNgks643rfGbECAGODtfqGKNqtNqJ VlsHQmcWdCQEfCYZG7s6jGX3YAoHdKi+A86TCGP0mBwpRdpgJ042sw3AoVWTMgGQ+QLR jgzbyyYEYqYgtPoQDTsMlB6Oh62yrIm/k8k4pqXdQyKPG0olMiy9e4bcJR7AAJ8oaHUK Q0i0+apx4ouhWuEigh7kVo8ykGx2qHO/CFUa5UFpKpydlNFdYTirnc6+81novZAsqhbu UjHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=b6KTirZejd3sDDi2THGHxOo7aZHrY3+M9Y8zIKfmv2E=; b=FtSVciYAEu0DI96UcV3WFrFtNQWqRfo6EHXEodvUuKHq2YQgtAspTOZL19zwmDGK3i ftUMU5x4MOIIC4KEuJVvh6m6V9HK2SjW5ibygXy99or/7C+WGD47c4/E9DgV6kucE4Nz IOO3Mr7DV9zwoRuJTValKXw/5ApWJ8jWPmK/N+tr1fFG1qMc36C0HGjh/GtLEU4DWdLx oQc9oMEtncW8ZLlf8CRtP3aCaehmdQ2l+JXIH8Lln8q2mBEKM+mVGvQ+hIgS54Cd4syW +Cteu85AljH+XT+r+o86u545EXQuKE20xBjrJ9LsO9ziWwBx9nnx0xjf5tcu/uADslVI X7Pw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=E05AXots; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id 11si2499658edv.53.2020.12.10.01.57.15; Thu, 10 Dec 2020 01:57:16 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=E05AXots; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729892AbgLJJ5F (ORCPT + 15 others); Thu, 10 Dec 2020 04:57:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46792 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729847AbgLJJ5B (ORCPT ); Thu, 10 Dec 2020 04:57:01 -0500 Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D373DC0611D0 for ; Thu, 10 Dec 2020 01:55:59 -0800 (PST) Received: by mail-wm1-x344.google.com with SMTP id v14so4068687wml.1 for ; Thu, 10 Dec 2020 01:55:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=b6KTirZejd3sDDi2THGHxOo7aZHrY3+M9Y8zIKfmv2E=; b=E05AXotsblQ2mtqna256uAfre29ZYXMDW8uvjcZvoBvNe1h42VU2MOyc2sfys2FpX6 2vppYEF4s5gt/kDiikZFeN5VgvwMfSbE3mVQIh0ECGSz9WzV7iyncZ7JT1p+JcVsJkBr uJG3F+S0jtFYTYSTCMZxJS20VjRb6/d2Q7q/5jQI5+lhVJIK3RmqkpAkieDsnmiWZtRw 3SOxlLpGUu7iINBuB0WA15UWQGQ1kXQeiA9yJ/ppbjrFyidfMe4sfbKLJ1YD19trFEzj WIE+HhM/2F+Eub7LPYUAoiy92z6XwS+869NgYhhhXkLgxGvCZOU+N+PYZPuBtF+WClia lhCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=b6KTirZejd3sDDi2THGHxOo7aZHrY3+M9Y8zIKfmv2E=; b=uHOo1pFg20c0oR0PFUwNChnK4uPtQMIMm18gL4F6bTF23qj9Ers3NlxLxUd3ufrb29 7YRpRGtQRIBgItIbmizmK0xCu0mdgVYpp+7gSI0sNmoTP4Nm6f0Pd2+4KFnaRwhX3xp8 wAck+CwAQAYPFMA/nRnbsUkndMgyie9NNTf75V03Nt6XidVMKUDlwbo7BgK0oS5MB/wI 244qEpfSDgc43BdrD3BjCSWFwCqp5SuGcXXJ3Ads2O/q8e7ymOvuwO+avYzSUDRHjJWK HqC65Z2zyYoIcPyS1vJ7TNq74Oxx8OAztnja67w/Qsw6J2TsMzaOQm5LSLBLvRN5ow1H SOkw== X-Gm-Message-State: AOAM533Bd4v08+pcs2zA+W0VN8giznxzo78WTaEMMJ0DQkDliP3XJ1VO LCIM4cDh7lLE6xlpWrmL/tVGgA== X-Received: by 2002:a7b:cb93:: with SMTP id m19mr7424694wmi.45.1607594158578; Thu, 10 Dec 2020 01:55:58 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:4468:1cc2:be0c:233f]) by smtp.gmail.com with ESMTPSA id l16sm9043721wrx.5.2020.12.10.01.55.57 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Dec 2020 01:55:58 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v4 04/10] mhi: pci_generic: Enable burst mode for hardware channels Date: Thu, 10 Dec 2020 11:02:49 +0100 Message-Id: <1607594575-31590-5-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607594575-31590-1-git-send-email-loic.poulain@linaro.org> References: <1607594575-31590-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hardware channels have a feature called burst mode that allows to queue transfer ring element(s) (TRE) to a channel without ringing the device doorbell. In that mode, the device is polling the channel context for new elements. This reduces the frequency of host initiated doorbells and increase throughput. Create a new dedicated macro for hardware channels with burst enabled. Signed-off-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 13a7e4f..077595c 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -76,6 +76,36 @@ struct mhi_pci_dev_info { .offload_channel = false, \ } +#define MHI_CHANNEL_CONFIG_HW_UL(ch_num, ch_name, el_count, ev_ring) \ + { \ + .num = ch_num, \ + .name = ch_name, \ + .num_elements = el_count, \ + .event_ring = ev_ring, \ + .dir = DMA_TO_DEVICE, \ + .ee_mask = BIT(MHI_EE_AMSS), \ + .pollcfg = 0, \ + .doorbell = MHI_DB_BRST_ENABLE, \ + .lpm_notify = false, \ + .offload_channel = false, \ + .doorbell_mode_switch = true, \ + } \ + +#define MHI_CHANNEL_CONFIG_HW_DL(ch_num, ch_name, el_count, ev_ring) \ + { \ + .num = ch_num, \ + .name = ch_name, \ + .num_elements = el_count, \ + .event_ring = ev_ring, \ + .dir = DMA_FROM_DEVICE, \ + .ee_mask = BIT(MHI_EE_AMSS), \ + .pollcfg = 0, \ + .doorbell = MHI_DB_BRST_ENABLE, \ + .lpm_notify = false, \ + .offload_channel = false, \ + .doorbell_mode_switch = true, \ + } + #define MHI_EVENT_CONFIG_DATA(ev_ring) \ { \ .num_elements = 128, \ @@ -110,8 +140,8 @@ static const struct mhi_channel_config modem_qcom_v1_mhi_channels[] = { MHI_CHANNEL_CONFIG_DL(15, "QMI", 4, 0), MHI_CHANNEL_CONFIG_UL(20, "IPCR", 8, 0), MHI_CHANNEL_CONFIG_DL(21, "IPCR", 8, 0), - MHI_CHANNEL_CONFIG_UL(100, "IP_HW0", 128, 1), - MHI_CHANNEL_CONFIG_DL(101, "IP_HW0", 128, 2), + MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 1), + MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 2), }; static const struct mhi_event_config modem_qcom_v1_mhi_events[] = { From patchwork Thu Dec 10 10:02:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 340978 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5381860jai; Thu, 10 Dec 2020 01:57:22 -0800 (PST) X-Google-Smtp-Source: ABdhPJxIk+hbXXt8s9enMnuWXDCIvLb/wHxlQExIIOp+SfyuioYIj4uCsav9g4U7Wh6e35UHo4jS X-Received: by 2002:aa7:de0f:: with SMTP id h15mr6005521edv.110.1607594242180; Thu, 10 Dec 2020 01:57:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607594242; cv=none; d=google.com; s=arc-20160816; b=AU13HgK2ZiLQvAd6ihRiIpu9l0HEzYvrzFGU+Z9dckXdWjxSe9MYcSQ8ue/GGwNTHY FJj1OSMU7hthfkbV7948wFHx9UXLRKDJF03NTPCgWDzlPXscd74YPRxsYZaxMnx2YWmd kOxn4NpS6+EiyEauRWBcy7c1MCQG+rwu1M81tsqqsl8He+KzJrXJEaYaDCwSFoFIeV6M 6H0c5N0/Ol65VaXUPq7chngsJvlLoXcmdoOF12KJhDRs5cwugRZ9VlxmCtoaDkd2GhMS CxKciBxbVl0u8aYH9qC4i2Yvfl6ApYMJQQamyHvnlBxRwYAmnkpbCqFQmibXrt5dN5sk n8xw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=Fnby8SpxIcKgI7tsgg/Bq2XmX0mmwcu8tdwtOs7lw6I=; b=ZTr7Rkr8ucxc+OeqrFmRlv8pIusTrCrw9ofoOd61m6EKkpLo41DmjrJlViEtOpYVvN a4AIhukyxtPiQyc1oaK+d0XO5ZS6arWFRgAtK+mynpU1ycPc+HONdMv49rzO2m4Ry/Wy QdKa/6yApf5ZrQqawLuScu5TUHzW3zPfKRjsuZ01hoczJqiBjW2g73DRRS2IhDH1ZTaK FaLlf/VT9tB2OWRa9W9H+tbkU+nrWSYfYBDtmeYB78CMMOvAcBrDOjaAL1wKOvbEoFlM SnakVEjkJo7RAXfLSVveMosg1YqxQdxTkLFvAHcqQx0c8PsYj9t/GvxQ+NvmZLfnFzA4 eYSg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VZqDePHx; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 120 +++++++++++++++++++++++++++++++++++++----- 1 file changed, 107 insertions(+), 13 deletions(-) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 077595c..d70d3ea 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -8,6 +8,7 @@ * Copyright (C) 2020 Linaro Ltd */ +#include #include #include #include @@ -177,6 +178,16 @@ static const struct pci_device_id mhi_pci_id_table[] = { }; MODULE_DEVICE_TABLE(pci, mhi_pci_id_table); +enum mhi_pci_device_status { + MHI_PCI_DEV_STARTED, +}; + +struct mhi_pci_device { + struct mhi_controller mhi_cntrl; + struct pci_saved_state *pci_state; + unsigned long status; +}; + static int mhi_pci_read_reg(struct mhi_controller *mhi_cntrl, void __iomem *addr, u32 *out) { @@ -196,6 +207,20 @@ static void mhi_pci_status_cb(struct mhi_controller *mhi_cntrl, /* Nothing to do for now */ } +static bool mhi_pci_is_alive(struct mhi_controller *mhi_cntrl) +{ + struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev); + u16 vendor = 0; + + if (pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor)) + return false; + + if (vendor == (u16) ~0 || vendor == 0) + return false; + + return true; +} + static int mhi_pci_claim(struct mhi_controller *mhi_cntrl, unsigned int bar_num, u64 dma_mask) { @@ -291,16 +316,20 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data; const struct mhi_controller_config *mhi_cntrl_config; + struct mhi_pci_device *mhi_pdev; struct mhi_controller *mhi_cntrl; int err; dev_dbg(&pdev->dev, "MHI PCI device found: %s\n", info->name); - mhi_cntrl = mhi_alloc_controller(); - if (!mhi_cntrl) + mhi_pdev = devm_kzalloc(&pdev->dev, sizeof(*mhi_pdev), GFP_KERNEL); + if (!mhi_pdev) return -ENOMEM; mhi_cntrl_config = info->config; + mhi_cntrl = &mhi_pdev->mhi_cntrl; + + mhi_initialize_controller(mhi_cntrl); mhi_cntrl->cntrl_dev = &pdev->dev; mhi_cntrl->iova_start = 0; mhi_cntrl->iova_stop = DMA_BIT_MASK(info->dma_data_width); @@ -315,17 +344,21 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) err = mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(info->dma_data_width)); if (err) - goto err_release; + return err; err = mhi_pci_get_irqs(mhi_cntrl, mhi_cntrl_config); if (err) - goto err_release; + return err; + + pci_set_drvdata(pdev, mhi_pdev); - pci_set_drvdata(pdev, mhi_cntrl); + /* Have stored pci confspace at hand for restore in sudden PCI error */ + pci_save_state(pdev); + mhi_pdev->pci_state = pci_store_saved_state(pdev); err = mhi_register_controller(mhi_cntrl, mhi_cntrl_config); if (err) - goto err_release; + return err; /* MHI bus does not power up the controller by default */ err = mhi_prepare_for_power_up(mhi_cntrl); @@ -340,33 +373,94 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) goto err_unprepare; } + set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + return 0; err_unprepare: mhi_unprepare_after_power_down(mhi_cntrl); err_unregister: mhi_unregister_controller(mhi_cntrl); -err_release: - mhi_free_controller(mhi_cntrl); return err; } static void mhi_pci_remove(struct pci_dev *pdev) { - struct mhi_controller *mhi_cntrl = pci_get_drvdata(pdev); + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, true); + mhi_unprepare_after_power_down(mhi_cntrl); + } - mhi_power_down(mhi_cntrl, true); - mhi_unprepare_after_power_down(mhi_cntrl); mhi_unregister_controller(mhi_cntrl); - mhi_free_controller(mhi_cntrl); } +void mhi_pci_reset_prepare(struct pci_dev *pdev) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + dev_info(&pdev->dev, "reset\n"); + + /* Clean up MHI state */ + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, false); + mhi_unprepare_after_power_down(mhi_cntrl); + } + + /* cause internal device reset */ + mhi_reg_soc_reset(mhi_cntrl); + + /* Be sure device reset has been executed */ + msleep(500); +} + +void mhi_pci_reset_done(struct pci_dev *pdev) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + int err; + + /* Restore initial known working PCI state */ + pci_load_saved_state(pdev, mhi_pdev->pci_state); + pci_restore_state(pdev); + + /* Is device status available ? */ + if (!mhi_pci_is_alive(mhi_cntrl)) { + dev_err(&pdev->dev, "reset failed\n"); + return; + } + + err = mhi_prepare_for_power_up(mhi_cntrl); + if (err) { + dev_err(&pdev->dev, "failed to prepare MHI controller\n"); + return; + } + + err = mhi_sync_power_up(mhi_cntrl); + if (err) { + dev_err(&pdev->dev, "failed to power up MHI controller\n"); + mhi_unprepare_after_power_down(mhi_cntrl); + return; + } + + set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); +} + +static const struct pci_error_handlers mhi_pci_err_handler = { + .reset_prepare = mhi_pci_reset_prepare, + .reset_done = mhi_pci_reset_done, +}; + static struct pci_driver mhi_pci_driver = { .name = "mhi-pci-generic", .id_table = mhi_pci_id_table, .probe = mhi_pci_probe, - .remove = mhi_pci_remove + .remove = mhi_pci_remove, + .err_handler = &mhi_pci_err_handler, }; module_pci_driver(mhi_pci_driver); From patchwork Thu Dec 10 10:02:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 340975 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5381720jai; Thu, 10 Dec 2020 01:57:02 -0800 (PST) X-Google-Smtp-Source: ABdhPJw7fyyFxJPGnhK7Q5HwqsydcSWv5+1xXpKP/IZg0K12FLnOt9KsgUYjkhk5R1XLeS2xlK5t X-Received: by 2002:a17:906:369b:: with SMTP id a27mr5826088ejc.183.1607594222443; Thu, 10 Dec 2020 01:57:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607594222; cv=none; d=google.com; s=arc-20160816; b=F3WKL567iEONCW/vWYmqVL7OIPyw5uD1NX2RccvxY3a365dcxFf+NKNJYeypbqKqjm r518k9otg/KVQWPTZujC0dscG8XN+sTTK8UO4t1eHISt7CA0vxHf1o2gNJ28t2S28jIM uJn03cLx3kjjr++/DJBXuxQWaNbhGyyZn8fvGSk2RcZTFiCtZj8t3A+xZpr1FkWba9xt n01NlbkJuZRhwDbdqXysqr62TyynhL7LQ9uQ8UdM84Lt9pV3saEuuDcJIeMqprveB7xX 7WzuZJG+A9I4MD3lD4hpIymiOL/B77k4ZbP+VSFAOIw2zOCmBmcx5Z9te9MOyJu9MiMT WqzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=YZ51yJhwC/8ztxtdW3nAMxNQRU2ROlrQxWx95f0lCfc=; b=jfTuVEX2I44yl+AQ3rXmemPmtJ9nwhHx8YDQEq9iSzLVspokuDzFBGbPuiP32F1Mim 7EAQCjuLxuB0Zc+9EOrfJr1TxbNRx4rnsoheRRKK/gQN46TwIlR/GQaBJ5z/O1SRzipn sq3sJk7OM10NOkviW+zJDvCpEMmzQd8+hZ2ZDGCbIU7AulqDKi39rWAV6PXkEgIRmWyU kKgA5pLFEtW1UWLBxwiJdZ5ibcRqqvBS/N18TKQ+y+ntAKrizLiXXUmSulfMyhtaO0PK fKPFSOLIoiksn5qf8FAbUg48ebnVkhG3TdrdCQCdO+byF2u65u3eCsjYuQaLMGfUuz7D 74qQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JyIdNHZK; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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During suspend, MHI device controller must be put in M3 state and PCI bus in D3 state. Add a recovery procedure allowing to reinitialize the device in case of error during resume steps, which can happen if device loses power (and so its context) while system suspend. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 102 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) -- 2.7.4 Reviewed-by: Hemant Kumar diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index d70d3ea..0c16f36 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -13,6 +13,7 @@ #include #include #include +#include #define MHI_PCI_DEFAULT_BAR_NUM 0 @@ -185,6 +186,7 @@ enum mhi_pci_device_status { struct mhi_pci_device { struct mhi_controller mhi_cntrl; struct pci_saved_state *pci_state; + struct work_struct recovery_work; unsigned long status; }; @@ -312,6 +314,48 @@ static void mhi_pci_runtime_put(struct mhi_controller *mhi_cntrl) /* no PM for now */ } +static void mhi_pci_recovery_work(struct work_struct *work) +{ + struct mhi_pci_device *mhi_pdev = container_of(work, struct mhi_pci_device, + recovery_work); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev); + int err; + + dev_warn(&pdev->dev, "device recovery started\n"); + + /* Clean up MHI state */ + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, false); + mhi_unprepare_after_power_down(mhi_cntrl); + } + + /* Check if we can recover without full reset */ + pci_set_power_state(pdev, PCI_D0); + pci_load_saved_state(pdev, mhi_pdev->pci_state); + pci_restore_state(pdev); + + if (!mhi_pci_is_alive(mhi_cntrl)) + goto err_try_reset; + + err = mhi_prepare_for_power_up(mhi_cntrl); + if (err) + goto err_try_reset; + + err = mhi_sync_power_up(mhi_cntrl); + if (err) + goto err_unprepare; + + set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + return; + +err_unprepare: + mhi_unprepare_after_power_down(mhi_cntrl); +err_try_reset: + if (pci_reset_function(pdev)) + dev_err(&pdev->dev, "Recovery failed\n"); +} + static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data; @@ -326,6 +370,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (!mhi_pdev) return -ENOMEM; + INIT_WORK(&mhi_pdev->recovery_work, mhi_pci_recovery_work); + mhi_cntrl_config = info->config; mhi_cntrl = &mhi_pdev->mhi_cntrl; @@ -390,6 +436,8 @@ static void mhi_pci_remove(struct pci_dev *pdev) struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + cancel_work_sync(&mhi_pdev->recovery_work); + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, true); mhi_unprepare_after_power_down(mhi_cntrl); @@ -455,12 +503,66 @@ static const struct pci_error_handlers mhi_pci_err_handler = { .reset_done = mhi_pci_reset_done, }; +int __maybe_unused mhi_pci_suspend(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + cancel_work_sync(&mhi_pdev->recovery_work); + + /* Transition to M3 state */ + mhi_pm_suspend(mhi_cntrl); + + pci_save_state(pdev); + pci_disable_device(pdev); + pci_wake_from_d3(pdev, true); + pci_set_power_state(pdev, PCI_D3hot); + + return 0; +} + +static int __maybe_unused mhi_pci_resume(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + int err; + + pci_set_power_state(pdev, PCI_D0); + pci_restore_state(pdev); + pci_set_master(pdev); + + err = pci_enable_device(pdev); + if (err) + goto err_recovery; + + /* Exit M3, transition to M0 state */ + err = mhi_pm_resume(mhi_cntrl); + if (err) { + dev_err(&pdev->dev, "failed to resume device: %d\n", err); + goto err_recovery; + } + + return 0; + +err_recovery: + /* The device may have loose power or crashed, try recovering it */ + queue_work(system_long_wq, &mhi_pdev->recovery_work); + return 0; +} + +static const struct dev_pm_ops mhi_pci_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(mhi_pci_suspend, mhi_pci_resume) +}; + static struct pci_driver mhi_pci_driver = { .name = "mhi-pci-generic", .id_table = mhi_pci_id_table, .probe = mhi_pci_probe, .remove = mhi_pci_remove, .err_handler = &mhi_pci_err_handler, + .driver.pm = &mhi_pci_pm_ops }; module_pci_driver(mhi_pci_driver); From patchwork Thu Dec 10 10:02:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 340983 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5381989jai; Thu, 10 Dec 2020 01:57:36 -0800 (PST) X-Google-Smtp-Source: ABdhPJxA+DX6qizBKZRtzniKNy/7BG0dyEAJIbyFBzdGbPmOACy/aY8IZ1cY1/k2DocWcNyktzSS X-Received: by 2002:a17:906:c087:: with SMTP id f7mr5668292ejz.492.1607594256265; Thu, 10 Dec 2020 01:57:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607594256; cv=none; d=google.com; s=arc-20160816; b=raTPazTtypA/bhbK9piW3GV34XpaMtNesyhJ/KpP9S0Y/UzRebPKpyEWwOrYP8bpC9 xi61rbhqAtMnGHjpg5TJiFgQSUIWa0nMuyfvy4gYyHzuOfiFhxknbTqM44Rl2rukRsLv J5+s95Dntt4paOamxtinwnN7W01GsygPtwJvjn3Zge3gs2QHULU3JnMMqb6f3+Z4m1OA sPxUHOeRXNnBOjkLnI7EpeexKfdDES+V/ZCO240JlfOcT4pCWN57ttc/2DNG4ZI2TFn8 I1xHxRrhvga7gAy0EP3JlUMVsiCjgge2lMTe2Bn6bDH6bdibp0QRwUDKsuegBYw/r7rI qGCA== ARC-Message-Signature: i=1; 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This patch enables error reporting and implements error_detected, slot_reset and resume callbacks. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 50 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 0c16f36..04be74b 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -8,6 +8,7 @@ * Copyright (C) 2020 Linaro Ltd */ +#include #include #include #include @@ -402,6 +403,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) pci_save_state(pdev); mhi_pdev->pci_state = pci_store_saved_state(pdev); + pci_enable_pcie_error_reporting(pdev); + err = mhi_register_controller(mhi_cntrl, mhi_cntrl_config); if (err) return err; @@ -498,7 +501,54 @@ void mhi_pci_reset_done(struct pci_dev *pdev) set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); } +static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev, + pci_channel_state_t state) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + dev_err(&pdev->dev, "PCI error detected, state = %u\n", state); + + if (state == pci_channel_io_perm_failure) + return PCI_ERS_RESULT_DISCONNECT; + + /* Clean up MHI state */ + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, false); + mhi_unprepare_after_power_down(mhi_cntrl); + } else { + /* Nothing to do */ + return PCI_ERS_RESULT_RECOVERED; + } + + pci_disable_device(pdev); + + return PCI_ERS_RESULT_NEED_RESET; +} + +static pci_ers_result_t mhi_pci_slot_reset(struct pci_dev *pdev) +{ + if (pci_enable_device(pdev)) { + dev_err(&pdev->dev, "Cannot re-enable PCI device after reset.\n"); + return PCI_ERS_RESULT_DISCONNECT; + } + + return PCI_ERS_RESULT_RECOVERED; +} + +static void mhi_pci_io_resume(struct pci_dev *pdev) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + + dev_err(&pdev->dev, "PCI slot reset done\n"); + + queue_work(system_long_wq, &mhi_pdev->recovery_work); +} + static const struct pci_error_handlers mhi_pci_err_handler = { + .error_detected = mhi_pci_error_detected, + .slot_reset = mhi_pci_slot_reset, + .resume = mhi_pci_io_resume, .reset_prepare = mhi_pci_reset_prepare, .reset_done = mhi_pci_reset_done, }; From patchwork Thu Dec 10 10:02:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 340977 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5381851jai; Thu, 10 Dec 2020 01:57:21 -0800 (PST) X-Google-Smtp-Source: ABdhPJzJdXyOcavnpQwHtXr6AIvTM/fUEzR/IFygUo+D4sz2HYQDKN1IiOUtwTxyrDYvfbuTi3fS X-Received: by 2002:a17:906:d9cf:: with SMTP id qk15mr5911082ejb.453.1607594241618; Thu, 10 Dec 2020 01:57:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607594241; cv=none; d=google.com; s=arc-20160816; b=cTcD82sHbGqLK/eH1oPVoL3/IzTsiA7HK8F1w0S5+DawZxiteKN0HjZ6P1+Iv9Xrx1 AmFfkY63gMPlgLqo7EuXCJnEasVk28ow7gR4/HqQ7+WCjRp4BnDlD7F7zyGF1nCIMu5T qdXzUdwYx0v/qGvYZjGOGZ2gd39UGkc9RnXga8sCPbg15I3lWCzREjIQ9Gu3rpHc5I9q nE0OYuTr2Exoj+yjiK5j0G8PTwGjtI2rxwk0+OfxEZ7GGfhPIWDZlF7+2Fki8auU6d+F cempjVm07zedgGW4HcCBseJ38jcS9gnNvNR17+p962wDMaX27ILk0Dkqc4D2c9862WTz A4Vw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=nl9F9FRgkpFT4WTwWLSdAjHNz9zUsK8BvjIh4l0ThtY=; b=MzZ6o0jXsk3mt9xWYTtd/NoiaZWGtMVKdlPUmJi6+GQwPpRaGhWuLMpomLytp5cT4N Vii8Cl0Xc19hH2asOjIZgH/5mvIva2yP/rwBQds5rXdDht6/d2tUUSOwoyAQShkUsHT4 hNOPaYLw++rGWoG+59MBp6wi66Teb1gvwv9NHmh6wtlDRpfwJQMSFN+4QRbHbrWYAaP2 Yd1Z95Wkx0h1R/4RuA+d8rqU+BvRoJ699kA8HXsUjUOop6m/sAr5nPkQU2yBbVKkt3JC GCwzUnizdsmFkGSlw7aax3EbqxnY0oLoMvN2i3eibk9wNW0GxfOPiiTQ1qPrC9/E158o Xr7w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H+EfUfU6; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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This patch implements a health-check mechanism to check regularly that device is alive (MHI layer can communicate with). If device is not alive (because a crash or unexpected reset), the recovery procedure is triggered. Tested successfully with Telit FN980m module. Signed-off-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam Reviewed-by: Hemant Kumar --- drivers/bus/mhi/pci_generic.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 04be74b..b427d34 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -14,10 +14,13 @@ #include #include #include +#include #include #define MHI_PCI_DEFAULT_BAR_NUM 0 +#define HEALTH_CHECK_PERIOD (HZ * 5) + /** * struct mhi_pci_dev_info - MHI PCI device specific information * @config: MHI controller configuration @@ -188,6 +191,7 @@ struct mhi_pci_device { struct mhi_controller mhi_cntrl; struct pci_saved_state *pci_state; struct work_struct recovery_work; + struct timer_list health_check_timer; unsigned long status; }; @@ -325,6 +329,8 @@ static void mhi_pci_recovery_work(struct work_struct *work) dev_warn(&pdev->dev, "device recovery started\n"); + del_timer(&mhi_pdev->health_check_timer); + /* Clean up MHI state */ if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, false); @@ -348,6 +354,7 @@ static void mhi_pci_recovery_work(struct work_struct *work) goto err_unprepare; set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); return; err_unprepare: @@ -357,6 +364,21 @@ static void mhi_pci_recovery_work(struct work_struct *work) dev_err(&pdev->dev, "Recovery failed\n"); } +static void health_check(struct timer_list *t) +{ + struct mhi_pci_device *mhi_pdev = from_timer(mhi_pdev, t, health_check_timer); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + if (!mhi_pci_is_alive(mhi_cntrl)) { + dev_err(mhi_cntrl->cntrl_dev, "Device died\n"); + queue_work(system_long_wq, &mhi_pdev->recovery_work); + return; + } + + /* reschedule in two seconds */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); +} + static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data; @@ -372,6 +394,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) return -ENOMEM; INIT_WORK(&mhi_pdev->recovery_work, mhi_pci_recovery_work); + timer_setup(&mhi_pdev->health_check_timer, health_check, 0); mhi_cntrl_config = info->config; mhi_cntrl = &mhi_pdev->mhi_cntrl; @@ -424,6 +447,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + /* start health check */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + return 0; err_unprepare: @@ -439,6 +465,7 @@ static void mhi_pci_remove(struct pci_dev *pdev) struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + del_timer(&mhi_pdev->health_check_timer); cancel_work_sync(&mhi_pdev->recovery_work); if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { @@ -456,6 +483,8 @@ void mhi_pci_reset_prepare(struct pci_dev *pdev) dev_info(&pdev->dev, "reset\n"); + del_timer(&mhi_pdev->health_check_timer); + /* Clean up MHI state */ if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, false); @@ -499,6 +528,7 @@ void mhi_pci_reset_done(struct pci_dev *pdev) } set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); } static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev, @@ -559,6 +589,7 @@ int __maybe_unused mhi_pci_suspend(struct device *dev) struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + del_timer(&mhi_pdev->health_check_timer); cancel_work_sync(&mhi_pdev->recovery_work); /* Transition to M3 state */ @@ -594,6 +625,9 @@ static int __maybe_unused mhi_pci_resume(struct device *dev) goto err_recovery; } + /* Resume health check */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + return 0; err_recovery: From patchwork Thu Dec 10 10:02:54 2020 Content-Type: text/plain; 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Increase the timeout to prevent MHI power-up issues. Signed-off-by: Loic Poulain Reviewed-by: Hemant Kumar --- drivers/bus/mhi/pci_generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index b427d34..0c48884 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -160,7 +160,7 @@ static const struct mhi_event_config modem_qcom_v1_mhi_events[] = { static const struct mhi_controller_config modem_qcom_v1_mhiv_config = { .max_channels = 128, - .timeout_ms = 5000, + .timeout_ms = 8000, .num_channels = ARRAY_SIZE(modem_qcom_v1_mhi_channels), .ch_cfg = modem_qcom_v1_mhi_channels, .num_events = ARRAY_SIZE(modem_qcom_v1_mhi_events), From patchwork Thu Dec 10 10:02:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 340981 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5381976jai; Thu, 10 Dec 2020 01:57:35 -0800 (PST) X-Google-Smtp-Source: ABdhPJwQbFMG/Hf5EV9QwnDWfAimz0V//LbkcpYOC1WQMwrBQFZdQSSh80rhHsxjVEvgWPQGxRbp X-Received: by 2002:a17:906:298c:: with SMTP id x12mr5699797eje.244.1607594255296; Thu, 10 Dec 2020 01:57:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607594255; cv=none; d=google.com; s=arc-20160816; b=aEKg/gqTEKsyKa5JepbRe/pHoWtaKSyac+isRUz+IaCO2VGipQutPEEklSF9RRILUt YND5b2BL3iYc+sML442JDdG2/FU61gCCFX/2BQ3KSSwr1PIXY4d+XF68/6ZZmiHHP0Ld G+qiJH3sU29V7XfXYTZ3FP1rTJZ1Cjh7EdGogZnAUYG+IGOzTTfyFxggpeh2YIWwOxEo yUb7zOel60oUvscYi9xWLI9d+1xRt82ERM9ax//Rmxz0SHwOiT9ZMy/SoFcSl6EvtY3v jHLtUISn8AYx40AxDRdBSMdZDLZ2dBfeq8cV4/okVSglMYCBXd7V2oBWTzfaU60rN6Er L5Ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=ZzQPfQ29PG8PsGOBCWPViCQjWX0wjL+LTkVDVSsgyt8=; b=Vf122GiDfKK46U/aaUBF25l7imDUI1rstgNN0gEhNzXdtAaRU/TTnX/GmSWmPa6z3C LXamBE/q4gd+jAZcVoDGvn4HXFN3IcMkOvhTxvWCMYId7xUzJNtIHf5W8lPi8JQvXWSg aYNA9SzDW+L/GTjylan7h76D+bJJuD64Owq3Myumdfh5Ej35iPDpUTSvqmj/Tt2R08fK /K0gQvy2477sJsSpi8a78lPlUaIax7uJhHfh4zCUOXMpKEoUd8LqAC3/7jIJyKEKZ+xF WHc+eiNr94sIA9B/HqFRcJAFaC+SLZ+KOn+j500xWxFW0EF7U2T77D5eq71LxbcijmD8 wh8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Yg/LY+8C"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id 11si2499658edv.53.2020.12.10.01.57.35; Thu, 10 Dec 2020 01:57:35 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Yg/LY+8C"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725904AbgLJJ5d (ORCPT + 15 others); Thu, 10 Dec 2020 04:57:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46830 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728679AbgLJJ5P (ORCPT ); Thu, 10 Dec 2020 04:57:15 -0500 Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [IPv6:2a00:1450:4864:20::342]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 925F4C0619D4 for ; Thu, 10 Dec 2020 01:56:05 -0800 (PST) Received: by mail-wm1-x342.google.com with SMTP id y23so4642236wmi.1 for ; Thu, 10 Dec 2020 01:56:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZzQPfQ29PG8PsGOBCWPViCQjWX0wjL+LTkVDVSsgyt8=; b=Yg/LY+8CYPMVJw7hS7aZb8gGucbCW/Lhp/QQQXplxMxrkBPSrk1LRfeG0WjMs7YSzJ cfIaL0odKagqdldhR2XZg+LYwsCVGHGxUn+g0zD0fDfnIiHJa7C/oNQdBJVikV4vJdW9 YQdcxQE6lhe/CQa5ocE3zFgERVYRg/GTf2s220jHBw5E/Kv9QVHbb+pfm1ms7gxghDyR ReNlV5OG0ipJQKv7m8ROQX6G+6QyxCeEohb4Gv2QEPb34WYoXXllPipDRqt2W0zGtJaQ XugU0lfT9k1fKeUpr+8Al0oCQMIO4or1906o+PbhxoUkBHePGITpp3mY3PWWHxpgAlwN qB9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZzQPfQ29PG8PsGOBCWPViCQjWX0wjL+LTkVDVSsgyt8=; b=REA/u+bWbjbNNLkK+Md1810i/c+dq3pSUGHB9JboxGgpvT/oQMJgPYFL555Nz9K0ei JizbB6KcR3h100dxICkvlNVX22zVsU35htYAXcodJlq4dF6yPJxvxF7yopy0xqs8gMwt oY9ixnQouuLcOVr6pKDQAwldRyJVeRDI0a+fwhClPln/7WgRUiba7enFPW14tI9yAl3J hsM/FsFOptRj9RoE69UMbdswWwRhJuEScnsYqKmdIvghWhE57KN3sk+C/f6Ya5d+K4oc WJbB21V53YmfOOWwuvaKPqeDupu/Nkl4IezXblwvItcy7JW8WjrDfhiKCBoZp58eBCIn rybA== X-Gm-Message-State: AOAM533rl22xSLJhWkbtgU96ltIA1SitxKAYmMieC9Uis1oI6Oj54J/c l9e7EaQgy29fvHSCMwN43EEIMg== X-Received: by 2002:a1c:6208:: with SMTP id w8mr7217356wmb.96.1607594164317; Thu, 10 Dec 2020 01:56:04 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:4468:1cc2:be0c:233f]) by smtp.gmail.com with ESMTPSA id l16sm9043721wrx.5.2020.12.10.01.56.03 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Dec 2020 01:56:03 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v4 10/10] mhi: pci_generic: Add diag channels Date: Thu, 10 Dec 2020 11:02:55 +0100 Message-Id: <1607594575-31590-11-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607594575-31590-1-git-send-email-loic.poulain@linaro.org> References: <1607594575-31590-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for Diag over MHI. Qualcomm Diag is the qualcomm diagnostics interface that can be used to collect modem logs, events, traces, etc. It can be used by tools such QPST or QXDM. This patch adds the DIAG channels and a dedicated event ring. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) -- 2.7.4 Reviewed-by: Hemant Kumar diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 0c48884..6f15b1d 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -140,22 +140,26 @@ struct mhi_pci_dev_info { } static const struct mhi_channel_config modem_qcom_v1_mhi_channels[] = { + MHI_CHANNEL_CONFIG_UL(4, "DIAG", 16, 1), + MHI_CHANNEL_CONFIG_DL(5, "DIAG", 16, 1), MHI_CHANNEL_CONFIG_UL(12, "MBIM", 4, 0), MHI_CHANNEL_CONFIG_DL(13, "MBIM", 4, 0), MHI_CHANNEL_CONFIG_UL(14, "QMI", 4, 0), MHI_CHANNEL_CONFIG_DL(15, "QMI", 4, 0), MHI_CHANNEL_CONFIG_UL(20, "IPCR", 8, 0), MHI_CHANNEL_CONFIG_DL(21, "IPCR", 8, 0), - MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 1), - MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 2), + MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 2), + MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 3), }; static const struct mhi_event_config modem_qcom_v1_mhi_events[] = { /* first ring is control+data ring */ MHI_EVENT_CONFIG_CTRL(0), + /* DIAG dedicated event ring */ + MHI_EVENT_CONFIG_DATA(1), /* Hardware channels request dedicated hardware event rings */ - MHI_EVENT_CONFIG_HW_DATA(1, 100), - MHI_EVENT_CONFIG_HW_DATA(2, 101) + MHI_EVENT_CONFIG_HW_DATA(2, 100), + MHI_EVENT_CONFIG_HW_DATA(3, 101) }; static const struct mhi_controller_config modem_qcom_v1_mhiv_config = {