From patchwork Tue Feb 6 15:53:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 127022 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp3041971ljc; Tue, 6 Feb 2018 07:55:57 -0800 (PST) X-Google-Smtp-Source: AH8x224u7VNwGx9P/MF7iuT7YKUeA7QqA1VxmRtYHSx0rkwLAFYWEb0wHhMyxJ0n9edS3TcfSN43 X-Received: by 10.36.84.85 with SMTP id t82mr3611215ita.3.1517932557292; Tue, 06 Feb 2018 07:55:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517932557; cv=none; d=google.com; s=arc-20160816; b=TvwRa1rBDhKZ+Vl4QvvRXyqFPhzi8VZgvnrAqIt8QjrD4d8Et6RHvnl3iiyn2GIIFH U+ixw+icoeaUXMCxPodmAuaIpfzlOHza/czfOb5JdF0HQA3ChrrDjq2XfmdhUkN1WGTN RpcGN2pWFmfDPulGkMHJwz565XaQgsi5uwEm3lrPhqPDwXwkJicwWE0dJScnud7oH1p7 Qdx2MD2U/reDh10DgQkIVZpFK4Yom6/wSihDFdE3upnLSdJC5A2Ni6tF1opbF6JCH4SM 1qv0VKhvO6lyt17CAxEReiDUDNs07ofHGWyv7UG0VX53t3zH5tjAb7/s58sWbH4wQpy5 mzhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:cc:references:in-reply-to:message-id:date:to :from:dkim-signature:arc-authentication-results; bh=KYv3Els1sDPSx9hfY/gYZZyeFGhwoEOanmlXIxvXdYE=; b=ccX0CtfkaOxn6Oj5wTT+Ww/omgOsE64mX91AA7PGGLSfxMcXVVutKV7hJwzjzessZa ZwzMk85iXybjsZC+v5G+K1JxC2zizfSMa1D13+C3uMMyVj0f7dUPTEB8vU9caVuuRN3o YeqcRCHhKTTnW7Ma7PmNgP/GUBvIIIEG5+MQeuXP2D6Y6xtuMm/NYPEbYt1sBKhnLm4C 3CkhKCg1LgDFAd07huu3xwFXAPfrpu+8OSSDwznz6EVpEi7rmHAURFoyl8N+jKyH5vRm 7Puk127z5Kq82CbF/mNCTLxn4QBnVXQDuj4wmdhwqH7zQmo3tJKAxfygU1kKEva+6Lis 8tiA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=OLWo2yYI; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id x6si2099216itd.47.2018.02.06.07.55.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Feb 2018 07:55:57 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=OLWo2yYI; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ej5Ys-0003Sx-Ki; Tue, 06 Feb 2018 15:53:34 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ej5Yr-0003Sf-DR for xen-devel@lists.xen.org; Tue, 06 Feb 2018 15:53:33 +0000 X-Inumbo-ID: d35b14fe-0b55-11e8-ba59-bc764e045a96 Received: from mail-wr0-x244.google.com (unknown [2a00:1450:400c:c0c::244]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id d35b14fe-0b55-11e8-ba59-bc764e045a96; Tue, 06 Feb 2018 16:53:08 +0100 (CET) Received: by mail-wr0-x244.google.com with SMTP id a43so2456213wrc.4 for ; Tue, 06 Feb 2018 07:53:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=x7Q0EkI6urPuL82QA2FYb5i+1aUaYcz5vrmPATaygoM=; b=OLWo2yYIcqezhjlRCDxePsFX7134mYE1c1tUQn1OvivYQZ9ww1oK/kwfNrvqexuzUD W1Xjo7JcOyxEK1YHkWLcnbEs3hd232KanxbNHmfaCpihiO8LpG4SI+L2H/BjU8REMrfI 6rfuNlkxEMvQrXsbsVH+r3bn8NsBNDxg8Drok= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=x7Q0EkI6urPuL82QA2FYb5i+1aUaYcz5vrmPATaygoM=; b=Xyk7yA+yjPt6qhFqiG0Xx/5NKHVAv5aMTptEgcFTALo+d1zL9CsXQb+2EJVOEHBn3G EW4jQzxBwGoF32ArVH+JojjxZkOVkjoCXFOoEBpd4hRREQdjTbYvvFvzVYVYlh57lkkG /5umx2RUWV882lLX1RRdMecV8MDRs99NGXvgpMsKjUCMWNPRWvUtCh39rfYsONWRVVGd nzpysS21gKad5UqsYfI805NoA/mQoq0Z8j1ZxbyGO0f9+JY36+uuIPosi5XOGzossQVj E+E16zqFPA1jRZYrayFktO3hJtUGz5eJ+j0/gYUBMNJMU2qWhe4u51RhSiUft38N6jOk bacg== X-Gm-Message-State: APf1xPAjJwLxrfcw8HjcZoqbWWK2cZ4oFGRZ91RB2WIhpWl/cpBWUeIS Lv6dLvtbvhh8KVvwpVdbUYBzibm/QRM= X-Received: by 10.223.148.33 with SMTP id 30mr2487383wrq.190.1517932411032; Tue, 06 Feb 2018 07:53:31 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id n20sm14950391wrb.56.2018.02.06.07.53.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Feb 2018 07:53:30 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Tue, 6 Feb 2018 15:53:23 +0000 Message-Id: <20180206155325.11703-2-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206155325.11703-1-julien.grall@linaro.org> References: <20180206155325.11703-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com, andre.przywara@linaro.org, Julien Grall Subject: [Xen-devel] [PATCH v3 1/3] xen/arm: vpsci: Removing dummy MIGRATE and MIGRATE_INFO_UP_CPU X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The PSCI call MIGRATE and MIGRATE_INFO_UP_CPU are optional and implemented as just returning PSCI_NOT_SUPPORTED (aka UNKNOWN_FUNCTION for SMCCC). The new SMCCC framework is able to deal with unimplemented function and return the proper error code. So remove the implementations for both function. Signed-off-by: Julien Grall Reviewed-by: Volodymyr Babchuk --- Changes in v3: - Add Volodymyr reviewed-by Changes in v2: - Remove define in psci.h - Update SSSC_SMCCC_FUNCTION_COUNT --- xen/arch/arm/vpsci.c | 10 ---------- xen/arch/arm/vsmc.c | 16 +--------------- xen/include/asm-arm/perfc_defn.h | 2 -- xen/include/asm-arm/psci.h | 4 ---- 4 files changed, 1 insertion(+), 31 deletions(-) diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index cd724904ef..979d32ed6d 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -172,21 +172,11 @@ int32_t do_psci_0_2_affinity_info(register_t target_affinity, return PSCI_0_2_AFFINITY_LEVEL_OFF; } -int32_t do_psci_0_2_migrate(uint32_t target_cpu) -{ - return PSCI_NOT_SUPPORTED; -} - uint32_t do_psci_0_2_migrate_info_type(void) { return PSCI_0_2_TOS_MP_OR_NOT_PRESENT; } -register_t do_psci_0_2_migrate_info_up_cpu(void) -{ - return PSCI_NOT_SUPPORTED; -} - void do_psci_0_2_system_off( void ) { struct domain *d = current->domain; diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index c9064de37a..997f2e0ebc 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -28,7 +28,7 @@ #define XEN_SMCCC_FUNCTION_COUNT 3 /* Number of functions currently supported by Standard Service Service Calls. */ -#define SSSC_SMCCC_FUNCTION_COUNT 13 +#define SSSC_SMCCC_FUNCTION_COUNT 11 static bool fill_uid(struct cpu_user_regs *regs, xen_uuid_t uuid) { @@ -157,11 +157,6 @@ static bool handle_sssc(struct cpu_user_regs *regs) PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); return true; - case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU: - perfc_incr(vpsci_migrate_info_up_cpu); - PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_up_cpu()); - return true; - case PSCI_0_2_FN_SYSTEM_OFF: perfc_incr(vpsci_system_off); do_psci_0_2_system_off(); @@ -206,15 +201,6 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_MIGRATE: - { - uint32_t tcpu = PSCI_ARG32(regs, 1); - - perfc_incr(vpsci_cpu_migrate); - PSCI_SET_RESULT(regs, do_psci_0_2_migrate(tcpu)); - return true; - } - case ARM_SMCCC_FUNC_CALL_COUNT: return fill_function_call_count(regs, SSSC_SMCCC_FUNCTION_COUNT); diff --git a/xen/include/asm-arm/perfc_defn.h b/xen/include/asm-arm/perfc_defn.h index 5f957ee6ec..a7acb7d21c 100644 --- a/xen/include/asm-arm/perfc_defn.h +++ b/xen/include/asm-arm/perfc_defn.h @@ -27,12 +27,10 @@ PERFCOUNTER(vpsci_cpu_on, "vpsci: cpu_on") PERFCOUNTER(vpsci_cpu_off, "vpsci: cpu_off") PERFCOUNTER(vpsci_version, "vpsci: version") PERFCOUNTER(vpsci_migrate_info_type, "vpsci: migrate_info_type") -PERFCOUNTER(vpsci_migrate_info_up_cpu, "vpsci: migrate_info_up_cpu") PERFCOUNTER(vpsci_system_off, "vpsci: system_off") PERFCOUNTER(vpsci_system_reset, "vpsci: system_reset") PERFCOUNTER(vpsci_cpu_suspend, "vpsci: cpu_suspend") PERFCOUNTER(vpsci_cpu_affinity_info, "vpsci: cpu_affinity_info") -PERFCOUNTER(vpsci_cpu_migrate, "vpsci: cpu_migrate") PERFCOUNTER(vgicd_reads, "vgicd: read") PERFCOUNTER(vgicd_writes, "vgicd: write") diff --git a/xen/include/asm-arm/psci.h b/xen/include/asm-arm/psci.h index 635ea5dae4..32c1f81f21 100644 --- a/xen/include/asm-arm/psci.h +++ b/xen/include/asm-arm/psci.h @@ -37,9 +37,7 @@ int32_t do_psci_0_2_cpu_on(register_t target_cpu, register_t entry_point, register_t context_id); int32_t do_psci_0_2_affinity_info(register_t target_affinity, uint32_t lowest_affinity_level); -int32_t do_psci_0_2_migrate(uint32_t target_cpu); uint32_t do_psci_0_2_migrate_info_type(void); -register_t do_psci_0_2_migrate_info_up_cpu(void); void do_psci_0_2_system_off(void); void do_psci_0_2_system_reset(void); @@ -57,9 +55,7 @@ void do_psci_0_2_system_reset(void); #define PSCI_0_2_FN_CPU_OFF 2 #define PSCI_0_2_FN_CPU_ON 3 #define PSCI_0_2_FN_AFFINITY_INFO 4 -#define PSCI_0_2_FN_MIGRATE 5 #define PSCI_0_2_FN_MIGRATE_INFO_TYPE 6 -#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU 7 #define PSCI_0_2_FN_SYSTEM_OFF 8 #define PSCI_0_2_FN_SYSTEM_RESET 9 From patchwork Tue Feb 6 15:53:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 127021 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp3041958ljc; Tue, 6 Feb 2018 07:55:56 -0800 (PST) X-Google-Smtp-Source: AH8x227Xt2t38GmPbI5JEFIprzKvKxso0xYQxWTpCibkYF0LfzsV9l7/rqT8gJ4Qnm/uGJ47/yuy X-Received: by 10.36.243.7 with SMTP id t7mr3615765ith.139.1517932556581; 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[192.237.175.120]) by mx.google.com with ESMTPS id x88si8196084ioi.194.2018.02.06.07.55.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Feb 2018 07:55:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=QPGlpXCs; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ej5Yt-0003TJ-RJ; Tue, 06 Feb 2018 15:53:35 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ej5Ys-0003Ss-NB for xen-devel@lists.xen.org; Tue, 06 Feb 2018 15:53:34 +0000 X-Inumbo-ID: d3f626af-0b55-11e8-ba59-bc764e045a96 Received: from mail-wr0-x243.google.com (unknown [2a00:1450:400c:c0c::243]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id d3f626af-0b55-11e8-ba59-bc764e045a96; Tue, 06 Feb 2018 16:53:09 +0100 (CET) Received: by mail-wr0-x243.google.com with SMTP id 41so2449478wrc.9 for ; Tue, 06 Feb 2018 07:53:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vNw+mkb7UWK/xRLl3S9ahaTtOXMpToN0lrKREbEqsn0=; b=QPGlpXCsx81rjzdTx9OvZo+i7QUB4Hdu73OFGcEM+C6Z7sEdskeBu+rRhMWGxs/Vb8 dga71Ry4dPxGgHDILId3pswY63sxq4At2T6rtGhNKJXcNGBZz9InpszZtmO6WJvAZrZf 5ILlAGynWeS3KGBNRkpRspZCdFBe5NSOkXNV8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vNw+mkb7UWK/xRLl3S9ahaTtOXMpToN0lrKREbEqsn0=; b=jVwWVL1352HZGHGDrRdm/LMe1Pbrf2Q4MT+RxyrV/vzYUPe1QQtKisbOLx0FY6xrkS Dsz9C7VzZzM6wpZCgTpIY3ffm9RcNLvswiz2WQS5/xlRLfBMLr0nIWqU2e7iw9WZWM2u ht05IaNu/TMLbY7c31aoDflez5yf+1xDhwPNRNEZWWZp5aVHtlVFzukRmiuvca+V3MAa NnAANy3O2NDUsOpUy099J6lW/ZcJbZKH+uhotqGB20py8v04c2hs8tzq9KXHolYdvp8Q Pq3Yej7PO97K0mD1cP8qqpQaCmchZWhzTj/LvGF1VMm8BMQUccO7OubeC2fjQLWJz23g K86Q== X-Gm-Message-State: APf1xPCl72RH849U44P98KdIG+IMWDPJeA7kiYvdUYEsheLU0HS3HIGo GUzjnoxQC406LeyN3e7/H6zwIGjHtoo= X-Received: by 10.223.171.67 with SMTP id r3mr2446613wrc.80.1517932411968; Tue, 06 Feb 2018 07:53:31 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id n20sm14950391wrb.56.2018.02.06.07.53.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Feb 2018 07:53:31 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Tue, 6 Feb 2018 15:53:24 +0000 Message-Id: <20180206155325.11703-3-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206155325.11703-1-julien.grall@linaro.org> References: <20180206155325.11703-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com, andre.przywara@linaro.org, Julien Grall Subject: [Xen-devel] [PATCH v3 2/3] xen/arm: vsmc: Don't implement function ID that doesn't exist X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The current implementation of SMCCC relies on the fact only function number (bits [15:0]) is enough to identify what to implement. However, PSCI call are only available in the range 0x84000000-0x8400001F and 0xC4000000-0xC400001F. Furthermore, not all SMC32 functions have equivalent in the SMC64. This is the case of: * PSCI_VERSION * CPU_OFF * MIGRATE_INFO_TYPE * SYSTEM_OFF * SYSTEM_RESET Similarly call count, call uid, revision can only be query using smc32/hvc32 fast calls (See 6.2 in ARM DEN 0028B). Xen should only implement identifier existing in the specification in order to avoid potential clash with later revision. Therefore rework the vsmc code to use the whole function identifier rather than only the function number. At the same time, the new macros for call count, call uid, revision are renamed to better suit the spec. Lastly, update SSSC_SMCCC_FUNCTION_COUNT to match the correct number of funtions. Note that version is not updated because the number has always been wrong, and nobody could properly use it. Signed-off-by: Julien Grall Reviewed-by: Volodymyr Babchuk --- This should be backported to Xen 4.10 as we should not implement functions identifier that does not exist toprevent clash with a later revision. Changes in v3: - Add Volodymyr's reviewed-by Changes in v2: - Rename the call count, call uid, revision macros - Update SSSC_SMCCC_FUNCTION_COUNT --- xen/arch/arm/vsmc.c | 39 ++++++++++++++++++++++----------------- xen/include/asm-arm/smccc.h | 20 +++++++++++++++++--- 2 files changed, 39 insertions(+), 20 deletions(-) diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index 997f2e0ebc..3d8cbcc808 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -28,7 +28,7 @@ #define XEN_SMCCC_FUNCTION_COUNT 3 /* Number of functions currently supported by Standard Service Service Calls. */ -#define SSSC_SMCCC_FUNCTION_COUNT 11 +#define SSSC_SMCCC_FUNCTION_COUNT 14 static bool fill_uid(struct cpu_user_regs *regs, xen_uuid_t uuid) { @@ -84,13 +84,15 @@ static bool fill_function_call_count(struct cpu_user_regs *regs, uint32_t cnt) /* SMCCC interface for hypervisor. Tell about itself. */ static bool handle_hypervisor(struct cpu_user_regs *regs) { - switch ( smccc_get_fn(get_user_reg(regs, 0)) ) + uint32_t fid = (uint32_t)get_user_reg(regs, 0); + + switch ( fid ) { - case ARM_SMCCC_FUNC_CALL_COUNT: + case ARM_SMCCC_CALL_COUNT_FID(HYPERVISOR): return fill_function_call_count(regs, XEN_SMCCC_FUNCTION_COUNT); - case ARM_SMCCC_FUNC_CALL_UID: + case ARM_SMCCC_CALL_UID_FID(HYPERVISOR): return fill_uid(regs, XEN_SMCCC_UID); - case ARM_SMCCC_FUNC_CALL_REVISION: + case ARM_SMCCC_REVISION_FID(HYPERVISOR): return fill_revision(regs, XEN_SMCCC_MAJOR_REVISION, XEN_SMCCC_MINOR_REVISION); default: @@ -140,36 +142,37 @@ static bool handle_sssc(struct cpu_user_regs *regs) { uint32_t fid = (uint32_t)get_user_reg(regs, 0); - switch ( smccc_get_fn(fid) ) + switch ( fid ) { - case PSCI_0_2_FN_PSCI_VERSION: + case PSCI_0_2_FN32(PSCI_VERSION): perfc_incr(vpsci_version); PSCI_SET_RESULT(regs, do_psci_0_2_version()); return true; - case PSCI_0_2_FN_CPU_OFF: + case PSCI_0_2_FN32(CPU_OFF): perfc_incr(vpsci_cpu_off); PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off()); return true; - case PSCI_0_2_FN_MIGRATE_INFO_TYPE: + case PSCI_0_2_FN32(MIGRATE_INFO_TYPE): perfc_incr(vpsci_migrate_info_type); PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); return true; - case PSCI_0_2_FN_SYSTEM_OFF: + case PSCI_0_2_FN32(SYSTEM_OFF): perfc_incr(vpsci_system_off); do_psci_0_2_system_off(); PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); return true; - case PSCI_0_2_FN_SYSTEM_RESET: + case PSCI_0_2_FN32(SYSTEM_RESET): perfc_incr(vpsci_system_reset); do_psci_0_2_system_reset(); PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); return true; - case PSCI_0_2_FN_CPU_ON: + case PSCI_0_2_FN32(CPU_ON): + case PSCI_0_2_FN64(CPU_ON): { register_t vcpuid = PSCI_ARG(regs, 1); register_t epoint = PSCI_ARG(regs, 2); @@ -180,7 +183,8 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_CPU_SUSPEND: + case PSCI_0_2_FN32(CPU_SUSPEND): + case PSCI_0_2_FN64(CPU_SUSPEND): { uint32_t pstate = PSCI_ARG32(regs, 1); register_t epoint = PSCI_ARG(regs, 2); @@ -191,7 +195,8 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_AFFINITY_INFO: + case PSCI_0_2_FN32(AFFINITY_INFO): + case PSCI_0_2_FN64(AFFINITY_INFO): { register_t taff = PSCI_ARG(regs, 1); uint32_t laff = PSCI_ARG32(regs, 2); @@ -201,13 +206,13 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case ARM_SMCCC_FUNC_CALL_COUNT: + case ARM_SMCCC_CALL_COUNT_FID(STANDARD): return fill_function_call_count(regs, SSSC_SMCCC_FUNCTION_COUNT); - case ARM_SMCCC_FUNC_CALL_UID: + case ARM_SMCCC_CALL_UID_FID(STANDARD): return fill_uid(regs, SSSC_SMCCC_UID); - case ARM_SMCCC_FUNC_CALL_REVISION: + case ARM_SMCCC_REVISION_FID(STANDARD): return fill_revision(regs, SSSC_SMCCC_MAJOR_REVISION, SSSC_SMCCC_MINOR_REVISION); diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index f543dea0bb..62b3a8cdf5 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -82,9 +82,23 @@ static inline uint32_t smccc_get_owner(register_t funcid) #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 /* List of generic function numbers */ -#define ARM_SMCCC_FUNC_CALL_COUNT 0xFF00 -#define ARM_SMCCC_FUNC_CALL_UID 0xFF01 -#define ARM_SMCCC_FUNC_CALL_REVISION 0xFF03 +#define ARM_SMCCC_CALL_COUNT_FID(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF00) + +#define ARM_SMCCC_CALL_UID_FID(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF01) + +#define ARM_SMCCC_REVISION_FID(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF03) /* Only one error code defined in SMCCC */ #define ARM_SMCCC_ERR_UNKNOWN_FUNCTION (-1) From patchwork Tue Feb 6 15:53:25 2018 Content-Type: text/plain; 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[192.237.175.120]) by mx.google.com with ESMTPS id n74si8647488iod.222.2018.02.06.07.55.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Feb 2018 07:55:57 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=WZuVm7Us; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ej5Yw-0003UW-5z; Tue, 06 Feb 2018 15:53:38 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ej5Yv-0003Tk-23 for xen-devel@lists.xen.org; Tue, 06 Feb 2018 15:53:37 +0000 X-Inumbo-ID: d4c0aa1e-0b55-11e8-ba59-bc764e045a96 Received: from mail-wm0-x242.google.com (unknown [2a00:1450:400c:c09::242]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id d4c0aa1e-0b55-11e8-ba59-bc764e045a96; Tue, 06 Feb 2018 16:53:11 +0100 (CET) Received: by mail-wm0-x242.google.com with SMTP id g1so4654881wmg.2 for ; Tue, 06 Feb 2018 07:53:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nMrOtw7A5zQmVjwzFpqEIwuWOk/l+TnpPJXPvdMSb5k=; b=WZuVm7Us+V3CWZd7/otcj4coydt43l35l45m8CP15LHDes2gXlwCTSOGcj0iHbBf1t lAP59i8ktLVdgIYOMzuRGRt7l5qDEK1BoOlo/Cv4965/DSoWo7q2ic5oETDV4gzU68VK 915IaFcZUo8sr+eIs+sZYXtpbqW3gUYh9NtZk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nMrOtw7A5zQmVjwzFpqEIwuWOk/l+TnpPJXPvdMSb5k=; b=OnHgSXp45FSpEKa95ufI1OTkKsDFFSzMpJDAZb2FoFKPf/EZvBMxkRq+xaidDLeMTc xewZ8eV11MrcRIS48NOdj0jcUB/C6lTD3EgV+/awJS7JJT1VRsSz1bOdfFOiaoTkWL2H 6GqTCs2J9PyKu6TdinMs7lGon+km7f4tqWamD/0lyS+c15KrkBry+02CwTsGjo7C9RwG oSwS6LSV3CWjbxA2P2Nh+fHmUQeTtuzEnr0Gy2IH4rnq2a9IxcWeBv+WugTLU3Mn7yte dAKOEjWqW0Q9iqP/lbL7lob5W35OdqZ7BnKXgJbAg3O4JKqkcilWUP7cZSaftrWwi4wy lcxQ== X-Gm-Message-State: APf1xPDM/aMwRaiEcC41HwSTO8KCCZ+J+NRApbjELMHjbqUkzsFbKLUv oPSJgaz/JkC9PbAiqWuWmsiKWgi8fSg= X-Received: by 10.28.232.82 with SMTP id f79mr2469872wmh.72.1517932413165; Tue, 06 Feb 2018 07:53:33 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id n20sm14950391wrb.56.2018.02.06.07.53.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Feb 2018 07:53:32 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Tue, 6 Feb 2018 15:53:25 +0000 Message-Id: <20180206155325.11703-4-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206155325.11703-1-julien.grall@linaro.org> References: <20180206155325.11703-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com, andre.przywara@linaro.org, Julien Grall Subject: [Xen-devel] [PATCH v3 3/3] xen/arm: vpsci: Move PSCI function dispatching from vsmc.c to vpsci.c X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" At the moment PSCI function dispatching is done in vsmc.c and the function implementation in vpsci.c. Some bits of the implementation is even done in vsmc.c (see PSCI_SYSTEM_RESET). This means that it is difficult to follow the implementation and also requires to export functions for each PSCI functions. Therefore move PSCI dispatching in two new functions do_vpsci_0_1_call and do_vpsci_0_2_call. The former will handle PSCI 0.1 call while the latter 0.2 or later call. At the same time, a new header vpsci.h was created to contain all definitions for virtual PSCI and avoid confusion with the host PSCI. Signed-off-by: Julien Grall Reviewed-by: Volodymyr Babchuk --- Changes in v3: - Add copyright and emacs magic in vpsci.h - Add a comment to update SCCC_SMCCC_*_REVISION once per release Changes in v2: - Add a 'v' in the function names to help distinguish virtual vs physical PSCI - Introduce vpsci.h and VSCPI_NR_FUNCS --- xen/arch/arm/vpsci.c | 148 +++++++++++++++++++++++++++++++++++++++----- xen/arch/arm/vsmc.c | 99 ++--------------------------- xen/include/asm-arm/psci.h | 19 ------ xen/include/asm-arm/vpsci.h | 42 +++++++++++++ 4 files changed, 182 insertions(+), 126 deletions(-) create mode 100644 xen/include/asm-arm/vpsci.h diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index 979d32ed6d..03fd4eb5b5 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -16,7 +16,7 @@ #include #include -#include +#include #include #include @@ -91,12 +91,12 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point, return PSCI_SUCCESS; } -int32_t do_psci_cpu_on(uint32_t vcpuid, register_t entry_point) +static int32_t do_psci_cpu_on(uint32_t vcpuid, register_t entry_point) { return do_common_cpu_on(vcpuid, entry_point, 0 , PSCI_VERSION(0, 1)); } -int32_t do_psci_cpu_off(uint32_t power_state) +static int32_t do_psci_cpu_off(uint32_t power_state) { struct vcpu *v = current; if ( !test_and_set_bit(_VPF_down, &v->pause_flags) ) @@ -104,13 +104,14 @@ int32_t do_psci_cpu_off(uint32_t power_state) return PSCI_SUCCESS; } -uint32_t do_psci_0_2_version(void) +static uint32_t do_psci_0_2_version(void) { return PSCI_VERSION(0, 2); } -register_t do_psci_0_2_cpu_suspend(uint32_t power_state, register_t entry_point, - register_t context_id) +static register_t do_psci_0_2_cpu_suspend(uint32_t power_state, + register_t entry_point, + register_t context_id) { struct vcpu *v = current; @@ -123,13 +124,14 @@ register_t do_psci_0_2_cpu_suspend(uint32_t power_state, register_t entry_point, return PSCI_SUCCESS; } -int32_t do_psci_0_2_cpu_off(void) +static int32_t do_psci_0_2_cpu_off(void) { return do_psci_cpu_off(0); } -int32_t do_psci_0_2_cpu_on(register_t target_cpu, register_t entry_point, - register_t context_id) +static int32_t do_psci_0_2_cpu_on(register_t target_cpu, + register_t entry_point, + register_t context_id) { return do_common_cpu_on(target_cpu, entry_point, context_id, PSCI_VERSION(0, 2)); @@ -144,8 +146,8 @@ static const unsigned long target_affinity_mask[] = { #endif }; -int32_t do_psci_0_2_affinity_info(register_t target_affinity, - uint32_t lowest_affinity_level) +static int32_t do_psci_0_2_affinity_info(register_t target_affinity, + uint32_t lowest_affinity_level) { struct domain *d = current->domain; struct vcpu *v; @@ -172,23 +174,141 @@ int32_t do_psci_0_2_affinity_info(register_t target_affinity, return PSCI_0_2_AFFINITY_LEVEL_OFF; } -uint32_t do_psci_0_2_migrate_info_type(void) +static uint32_t do_psci_0_2_migrate_info_type(void) { return PSCI_0_2_TOS_MP_OR_NOT_PRESENT; } -void do_psci_0_2_system_off( void ) +static void do_psci_0_2_system_off( void ) { struct domain *d = current->domain; domain_shutdown(d,SHUTDOWN_poweroff); } -void do_psci_0_2_system_reset(void) +static void do_psci_0_2_system_reset(void) { struct domain *d = current->domain; domain_shutdown(d,SHUTDOWN_reboot); } +#define PSCI_SET_RESULT(reg, val) set_user_reg(reg, 0, val) +#define PSCI_ARG(reg, n) get_user_reg(reg, n) + +#ifdef CONFIG_ARM_64 +#define PSCI_ARG32(reg, n) (uint32_t)(get_user_reg(reg, n)) +#else +#define PSCI_ARG32(reg, n) PSCI_ARG(reg, n) +#endif + +/* + * PSCI 0.1 calls. It will return false if the function ID is not + * handled. + */ +bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid) +{ + switch ( (uint32_t)get_user_reg(regs, 0) ) + { + case PSCI_cpu_off: + { + uint32_t pstate = PSCI_ARG32(regs, 1); + + perfc_incr(vpsci_cpu_off); + PSCI_SET_RESULT(regs, do_psci_cpu_off(pstate)); + return true; + } + case PSCI_cpu_on: + { + uint32_t vcpuid = PSCI_ARG32(regs, 1); + register_t epoint = PSCI_ARG(regs, 2); + + perfc_incr(vpsci_cpu_on); + PSCI_SET_RESULT(regs, do_psci_cpu_on(vcpuid, epoint)); + return true; + } + default: + return false; + } +} + +/* + * PSCI 0.2 or later calls. It will return false if the function ID is + * not handled. + */ +bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid) +{ + /* + * /!\ VPSCI_NR_FUNCS (in asm-arm/vpsci.h) should be updated when + * adding/removing a function. SCCC_SMCCC_*_REVISION should be + * updated once per release. + */ + switch ( fid ) + { + case PSCI_0_2_FN32(PSCI_VERSION): + perfc_incr(vpsci_version); + PSCI_SET_RESULT(regs, do_psci_0_2_version()); + return true; + + case PSCI_0_2_FN32(CPU_OFF): + perfc_incr(vpsci_cpu_off); + PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off()); + return true; + + case PSCI_0_2_FN32(MIGRATE_INFO_TYPE): + perfc_incr(vpsci_migrate_info_type); + PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); + return true; + + case PSCI_0_2_FN32(SYSTEM_OFF): + perfc_incr(vpsci_system_off); + do_psci_0_2_system_off(); + PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); + return true; + + case PSCI_0_2_FN32(SYSTEM_RESET): + perfc_incr(vpsci_system_reset); + do_psci_0_2_system_reset(); + PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); + return true; + + case PSCI_0_2_FN32(CPU_ON): + case PSCI_0_2_FN64(CPU_ON): + { + register_t vcpuid = PSCI_ARG(regs, 1); + register_t epoint = PSCI_ARG(regs, 2); + register_t cid = PSCI_ARG(regs, 3); + + perfc_incr(vpsci_cpu_on); + PSCI_SET_RESULT(regs, do_psci_0_2_cpu_on(vcpuid, epoint, cid)); + return true; + } + + case PSCI_0_2_FN32(CPU_SUSPEND): + case PSCI_0_2_FN64(CPU_SUSPEND): + { + uint32_t pstate = PSCI_ARG32(regs, 1); + register_t epoint = PSCI_ARG(regs, 2); + register_t cid = PSCI_ARG(regs, 3); + + perfc_incr(vpsci_cpu_suspend); + PSCI_SET_RESULT(regs, do_psci_0_2_cpu_suspend(pstate, epoint, cid)); + return true; + } + + case PSCI_0_2_FN32(AFFINITY_INFO): + case PSCI_0_2_FN64(AFFINITY_INFO): + { + register_t taff = PSCI_ARG(regs, 1); + uint32_t laff = PSCI_ARG32(regs, 2); + + perfc_incr(vpsci_cpu_affinity_info); + PSCI_SET_RESULT(regs, do_psci_0_2_affinity_info(taff, laff)); + return true; + } + default: + return false; + } +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index 3d8cbcc808..3d3bd95fee 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -19,16 +19,16 @@ #include #include #include -#include #include #include #include +#include /* Number of functions currently supported by Hypervisor Service. */ #define XEN_SMCCC_FUNCTION_COUNT 3 /* Number of functions currently supported by Standard Service Service Calls. */ -#define SSSC_SMCCC_FUNCTION_COUNT 14 +#define SSSC_SMCCC_FUNCTION_COUNT (3 + VPSCI_NR_FUNCS) static bool fill_uid(struct cpu_user_regs *regs, xen_uuid_t uuid) { @@ -100,41 +100,13 @@ static bool handle_hypervisor(struct cpu_user_regs *regs) } } -#define PSCI_SET_RESULT(reg, val) set_user_reg(reg, 0, val) -#define PSCI_ARG(reg, n) get_user_reg(reg, n) - -#ifdef CONFIG_ARM_64 -#define PSCI_ARG32(reg, n) (uint32_t)(get_user_reg(reg, n)) -#else -#define PSCI_ARG32(reg, n) PSCI_ARG(reg, n) -#endif - /* Existing (pre SMCCC) APIs. This includes PSCI 0.1 interface */ static bool handle_existing_apis(struct cpu_user_regs *regs) { /* Only least 32 bits are significant (ARM DEN 0028B, page 12) */ - switch ( (uint32_t)get_user_reg(regs, 0) ) - { - case PSCI_cpu_off: - { - uint32_t pstate = PSCI_ARG32(regs, 1); - - perfc_incr(vpsci_cpu_off); - PSCI_SET_RESULT(regs, do_psci_cpu_off(pstate)); - return true; - } - case PSCI_cpu_on: - { - uint32_t vcpuid = PSCI_ARG32(regs, 1); - register_t epoint = PSCI_ARG(regs, 2); + uint32_t fid = (uint32_t)get_user_reg(regs, 0); - perfc_incr(vpsci_cpu_on); - PSCI_SET_RESULT(regs, do_psci_cpu_on(vcpuid, epoint)); - return true; - } - default: - return false; - } + return do_vpsci_0_1_call(regs, fid); } /* PSCI 0.2 interface and other Standard Secure Calls */ @@ -142,70 +114,11 @@ static bool handle_sssc(struct cpu_user_regs *regs) { uint32_t fid = (uint32_t)get_user_reg(regs, 0); - switch ( fid ) - { - case PSCI_0_2_FN32(PSCI_VERSION): - perfc_incr(vpsci_version); - PSCI_SET_RESULT(regs, do_psci_0_2_version()); + if ( do_vpsci_0_2_call(regs, fid) ) return true; - case PSCI_0_2_FN32(CPU_OFF): - perfc_incr(vpsci_cpu_off); - PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off()); - return true; - - case PSCI_0_2_FN32(MIGRATE_INFO_TYPE): - perfc_incr(vpsci_migrate_info_type); - PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); - return true; - - case PSCI_0_2_FN32(SYSTEM_OFF): - perfc_incr(vpsci_system_off); - do_psci_0_2_system_off(); - PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); - return true; - - case PSCI_0_2_FN32(SYSTEM_RESET): - perfc_incr(vpsci_system_reset); - do_psci_0_2_system_reset(); - PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); - return true; - - case PSCI_0_2_FN32(CPU_ON): - case PSCI_0_2_FN64(CPU_ON): - { - register_t vcpuid = PSCI_ARG(regs, 1); - register_t epoint = PSCI_ARG(regs, 2); - register_t cid = PSCI_ARG(regs, 3); - - perfc_incr(vpsci_cpu_on); - PSCI_SET_RESULT(regs, do_psci_0_2_cpu_on(vcpuid, epoint, cid)); - return true; - } - - case PSCI_0_2_FN32(CPU_SUSPEND): - case PSCI_0_2_FN64(CPU_SUSPEND): - { - uint32_t pstate = PSCI_ARG32(regs, 1); - register_t epoint = PSCI_ARG(regs, 2); - register_t cid = PSCI_ARG(regs, 3); - - perfc_incr(vpsci_cpu_suspend); - PSCI_SET_RESULT(regs, do_psci_0_2_cpu_suspend(pstate, epoint, cid)); - return true; - } - - case PSCI_0_2_FN32(AFFINITY_INFO): - case PSCI_0_2_FN64(AFFINITY_INFO): + switch ( fid ) { - register_t taff = PSCI_ARG(regs, 1); - uint32_t laff = PSCI_ARG32(regs, 2); - - perfc_incr(vpsci_cpu_affinity_info); - PSCI_SET_RESULT(regs, do_psci_0_2_affinity_info(taff, laff)); - return true; - } - case ARM_SMCCC_CALL_COUNT_FID(STANDARD): return fill_function_call_count(regs, SSSC_SMCCC_FUNCTION_COUNT); diff --git a/xen/include/asm-arm/psci.h b/xen/include/asm-arm/psci.h index 32c1f81f21..3c44468e72 100644 --- a/xen/include/asm-arm/psci.h +++ b/xen/include/asm-arm/psci.h @@ -22,25 +22,6 @@ int call_psci_cpu_on(int cpu); void call_psci_system_off(void); void call_psci_system_reset(void); -/* functions to handle guest PSCI requests */ -int32_t do_psci_cpu_on(uint32_t vcpuid, register_t entry_point); -int32_t do_psci_cpu_off(uint32_t power_state); -int32_t do_psci_cpu_suspend(uint32_t power_state, register_t entry_point); -int32_t do_psci_migrate(uint32_t vcpuid); - -/* PSCI 0.2 functions to handle guest PSCI requests */ -uint32_t do_psci_0_2_version(void); -register_t do_psci_0_2_cpu_suspend(uint32_t power_state, register_t entry_point, - register_t context_id); -int32_t do_psci_0_2_cpu_off(void); -int32_t do_psci_0_2_cpu_on(register_t target_cpu, register_t entry_point, - register_t context_id); -int32_t do_psci_0_2_affinity_info(register_t target_affinity, - uint32_t lowest_affinity_level); -uint32_t do_psci_0_2_migrate_info_type(void); -void do_psci_0_2_system_off(void); -void do_psci_0_2_system_reset(void); - /* PSCI v0.2 interface */ #define PSCI_0_2_FN32(name) ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_CONV_32, \ diff --git a/xen/include/asm-arm/vpsci.h b/xen/include/asm-arm/vpsci.h new file mode 100644 index 0000000000..035a41e812 --- /dev/null +++ b/xen/include/asm-arm/vpsci.h @@ -0,0 +1,42 @@ +/* + * xen/include/asm-arm/vpsci.h + * + * Julien Grall + * Copyright (c) 2018 Linaro Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; under version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see . + */ + +#ifndef __ASM_VPSCI_H__ +#define __ASM_VPSCI_H__ + +#include + +/* Number of function implemented by virtual PSCI (only 0.2 or later) */ +#define VPSCI_NR_FUNCS 11 + +/* Functions handle PSCI calls from the guests */ +bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid); +bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid); + +#endif /* __ASM_VPSCI_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */