From patchwork Mon Jan 18 05:50:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 365687 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45426C433E0 for ; Mon, 18 Jan 2021 05:52:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1C90C2251F for ; Mon, 18 Jan 2021 05:52:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731544AbhARFwi (ORCPT ); Mon, 18 Jan 2021 00:52:38 -0500 Received: from wnew4-smtp.messagingengine.com ([64.147.123.18]:38347 "EHLO wnew4-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732296AbhARFvu (ORCPT ); Mon, 18 Jan 2021 00:51:50 -0500 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailnew.west.internal (Postfix) with ESMTP id 24EA2137A; Mon, 18 Jan 2021 00:50:43 -0500 (EST) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Mon, 18 Jan 2021 00:50:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=CaMcsfujlipTp oTOms4DDzue5HB3L8f3O43jGnIlzwA=; b=KdT1SYPSYslKuslrTwoOG7mB+o50M NvbnGHRxfOkyHjBC5gnEiYVnksYoY2N8arN0uoOChMUfV81DHjsqdFv+UM9HBFUp sgCyw5eXAvUU8+6oZbtzbYHwwp60hq9uJwciEcmnamyESyuzoUDF0CWOym+leHc7 tpUvdHfs8VLreybr5et3YOe5SW2/WPFQknSObUPx+gkMuBgQCNmus4VnEysgSil7 /hG43ZEV4lWcATAUXM2Zv5SiajEoOPy7BYfnikrEhfnsrhXzIaNFbLpaKui4zJlS L1ma8IGN7qMkzWe4X0NKATJLCDIu5b2rHjV8BIKPL43FRgYKaNBNL25Ww== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=CaMcsfujlipTpoTOms4DDzue5HB3L8f3O43jGnIlzwA=; b=bVqKuqjc CrHZ3Dq0rxhBz4lGlC9wYq76S5Q73ed/6sNwVfCmvPnPyKRa6Si7YwPLpoev39EO ejDM+4NPxpzs9YrDoUtwqz9N1r9pW/BmFpuieG/WkyNLQz/VA77Z0pgrQkBhh2fs te4dl7bC+lnj6RXAypOKKQVrXCQO0r68ISn4SlAj/CbKy6WpduMAZHIpf6GRtDIm dnJBA/6TosNILCMm28RhsS/eE9AixmdyLTLyXBcKF7pRpM5HhveZg6P5FuPdjmFI nETzeoVC0cK0y2UhGyidAdTZmq9A9jxsKUdcucsIloZMiQ9Cz029k3f5IJKsv8or v1Njh9jYY3KXtA== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrtdejgdekjecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufgrmhhuvghl ucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecuggftrf grthhtvghrnhepleeuleegtedtgffgueffveekhfdutdetiefgvefhtdfftdejgfetgeel geegvddunecuffhomhgrihhnpeguvghvihgtvghtrhgvvgdrohhrghenucfkphepjedtrd dufeehrddugeekrdduhedunecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehm rghilhhfrhhomhepshgrmhhuvghlsehshhholhhlrghnugdrohhrgh X-ME-Proxy: Received: from titanium.stl.sholland.net (70-135-148-151.lightspeed.stlsmo.sbcglobal.net [70.135.148.151]) by mail.messagingengine.com (Postfix) with ESMTPA id 9B34924005C; Mon, 18 Jan 2021 00:50:41 -0500 (EST) From: Samuel Holland To: Thomas Gleixner , Marc Zyngier , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec Cc: Ondrej Jirman , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Samuel Holland , Rob Herring Subject: [PATCH v5 01/10] dt-bindings: irq: sun6i-r: Split the binding from sun7i-nmi Date: Sun, 17 Jan 2021 23:50:31 -0600 Message-Id: <20210118055040.21910-2-samuel@sholland.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210118055040.21910-1-samuel@sholland.org> References: <20210118055040.21910-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The R_INTC in the A31 and newer sun8i/sun50i SoCs has additional functionality compared to the sun7i/sun9i NMI controller. Among other things, it multiplexes access to up to 128 interrupts corresponding to (and in parallel to) the first 128 GIC SPIs. This means the NMI is no longer the lowest-numbered hwirq at this irqchip, since it is SPI 32 or 96 (depending on SoC). hwirq 0 now corresponds to SPI 0, usually UART0. To allow access to all multiplexed IRQs, the R_INTC requires a new binding where the interrupt number matches the GIC interrupt number. Otherwise, interrupts with hwirq numbers below the NMI would not be representable in the device tree. For simplicity, copy the three-cell GIC binding; this disambiguates interrupt 0 in the old binding (the NMI) from interrupt 0 in the new binding (SPI 0) by the number of cells. Because the H6 R_INTC has a different mapping from multiplexed IRQs to top-level register bits, it is no longer compatible with the A31 R_INTC. Acked-by: Maxime Ripard Reviewed-by: Rob Herring Signed-off-by: Samuel Holland --- .../allwinner,sun6i-a31-r-intc.yaml | 66 +++++++++++++++++++ .../allwinner,sun7i-a20-sc-nmi.yaml | 10 --- 2 files changed, 66 insertions(+), 10 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml new file mode 100644 index 000000000000..50e607e607c8 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A31 NMI/Wakeup Interrupt Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai + - Maxime Ripard + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + "#interrupt-cells": + const: 3 + description: + The first cell is GIC_SPI (0), the second cell is the IRQ number, and + the third cell is the trigger type as defined in interrupt.txt in this + directory. + + compatible: + oneOf: + - const: allwinner,sun6i-a31-r-intc + - items: + - enum: + - allwinner,sun8i-a83t-r-intc + - allwinner,sun50i-a64-r-intc + - const: allwinner,sun6i-a31-r-intc + - const: allwinner,sun50i-h6-r-intc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: + The GIC interrupt labeled as "External NMI". + + interrupt-controller: true + +required: + - "#interrupt-cells" + - compatible + - reg + - interrupts + - interrupt-controller + +additionalProperties: false + +examples: + - | + #include + + r_intc: interrupt-controller@1f00c00 { + compatible = "allwinner,sun50i-a64-r-intc", + "allwinner,sun6i-a31-r-intc"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x01f00c00 0x400>; + interrupts = ; + }; + +... diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml index 4fd1e2780026..7fc9ad5ef38c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml @@ -22,26 +22,16 @@ properties: compatible: oneOf: - - const: allwinner,sun6i-a31-r-intc - const: allwinner,sun6i-a31-sc-nmi deprecated: true - const: allwinner,sun7i-a20-sc-nmi - - items: - - const: allwinner,sun8i-a83t-r-intc - - const: allwinner,sun6i-a31-r-intc - items: - const: allwinner,sun8i-v3s-nmi - const: allwinner,sun9i-a80-nmi - const: allwinner,sun9i-a80-nmi - - items: - - const: allwinner,sun50i-a64-r-intc - - const: allwinner,sun6i-a31-r-intc - items: - const: allwinner,sun50i-a100-nmi - const: allwinner,sun9i-a80-nmi - - items: - - const: allwinner,sun50i-h6-r-intc - - const: allwinner,sun6i-a31-r-intc reg: maxItems: 1 From patchwork Mon Jan 18 05:50:34 2021 Content-Type: text/plain; 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Mon, 18 Jan 2021 00:50:43 -0500 (EST) From: Samuel Holland To: Thomas Gleixner , Marc Zyngier , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec Cc: Ondrej Jirman , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Samuel Holland Subject: [PATCH v5 04/10] irqchip/sun6i-r: Add wakeup support Date: Sun, 17 Jan 2021 23:50:34 -0600 Message-Id: <20210118055040.21910-5-samuel@sholland.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210118055040.21910-1-samuel@sholland.org> References: <20210118055040.21910-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Maintain bitmaps of wake-enabled IRQs and mux inputs, and program them to the hardware during the syscore phase of suspend and shutdown. Then restore the original set of enabled IRQs (only the NMI) during resume. This serves two purposes. First, it lets power management firmware running on the ARISC coprocessor know which wakeup sources Linux wants to have enabled. That way, it can avoid turning them off when it shuts down the remainder of the clock tree. Second, it preconfigures the coprocessor's interrupt controller, so the firmware's wakeup logic is as simple as waiting for an interrupt to arrive. The suspend/resume logic is not conditional on PM_SLEEP because it is identical to the init/shutdown logic. Wake IRQs may be enabled during shutdown to allow powering the board back on. As an example, see commit a5c5e50cce9d ("Input: gpio-keys - add shutdown callback"). Acked-by: Maxime Ripard Signed-off-by: Samuel Holland --- drivers/irqchip/irq-sun6i-r.c | 107 ++++++++++++++++++++++++++++++++-- 1 file changed, 101 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-sun6i-r.c b/drivers/irqchip/irq-sun6i-r.c index 284b56905eb7..4cd3e533740b 100644 --- a/drivers/irqchip/irq-sun6i-r.c +++ b/drivers/irqchip/irq-sun6i-r.c @@ -39,6 +39,7 @@ * set of 128 mux bits. This requires a second set of top-level registers. */ +#include #include #include #include @@ -46,6 +47,7 @@ #include #include #include +#include #include @@ -67,8 +69,17 @@ #define SUN6I_NR_DIRECT_IRQS 16 #define SUN6I_NR_MUX_BITS 128 +struct sun6i_r_intc_variant { + u32 first_mux_irq; + u32 nr_mux_irqs; + u32 mux_valid[BITS_TO_U32(SUN6I_NR_MUX_BITS)]; +}; + static void __iomem *base; static irq_hw_number_t nmi_hwirq; +static DECLARE_BITMAP(wake_irq_enabled, SUN6I_NR_TOP_LEVEL_IRQS); +static DECLARE_BITMAP(wake_mux_enabled, SUN6I_NR_MUX_BITS); +static DECLARE_BITMAP(wake_mux_valid, SUN6I_NR_MUX_BITS); static void sun6i_r_intc_ack_nmi(void) { @@ -145,6 +156,21 @@ static int sun6i_r_intc_nmi_set_irqchip_state(struct irq_data *data, return irq_chip_set_parent_state(data, which, state); } +static int sun6i_r_intc_irq_set_wake(struct irq_data *data, unsigned int on) +{ + unsigned long offset_from_nmi = data->hwirq - nmi_hwirq; + + if (offset_from_nmi < SUN6I_NR_DIRECT_IRQS) + assign_bit(offset_from_nmi, wake_irq_enabled, on); + else if (test_bit(data->hwirq, wake_mux_valid)) + assign_bit(data->hwirq, wake_mux_enabled, on); + else + /* Not wakeup capable. */ + return -EPERM; + + return 0; +} + static struct irq_chip sun6i_r_intc_nmi_chip = { .name = "sun6i-r-intc", .irq_ack = sun6i_r_intc_nmi_ack, @@ -154,8 +180,19 @@ static struct irq_chip sun6i_r_intc_nmi_chip = { .irq_set_affinity = irq_chip_set_affinity_parent, .irq_set_type = sun6i_r_intc_nmi_set_type, .irq_set_irqchip_state = sun6i_r_intc_nmi_set_irqchip_state, - .flags = IRQCHIP_SET_TYPE_MASKED | - IRQCHIP_SKIP_SET_WAKE, + .irq_set_wake = sun6i_r_intc_irq_set_wake, + .flags = IRQCHIP_SET_TYPE_MASKED, +}; + +static struct irq_chip sun6i_r_intc_wakeup_chip = { + .name = "sun6i-r-intc", + .irq_mask = irq_chip_mask_parent, + .irq_unmask = irq_chip_unmask_parent, + .irq_eoi = irq_chip_eoi_parent, + .irq_set_affinity = irq_chip_set_affinity_parent, + .irq_set_type = irq_chip_set_type_parent, + .irq_set_wake = sun6i_r_intc_irq_set_wake, + .flags = IRQCHIP_SET_TYPE_MASKED, }; static int sun6i_r_intc_domain_translate(struct irq_domain *domain, @@ -215,8 +252,8 @@ static int sun6i_r_intc_domain_alloc(struct irq_domain *domain, &sun6i_r_intc_nmi_chip, 0); irq_set_handler(virq, handle_fasteoi_ack_irq); } else { - /* Only the NMI is currently supported. */ - return -EINVAL; + irq_domain_set_hwirq_and_chip(domain, virq, hwirq, + &sun6i_r_intc_wakeup_chip, 0); } } @@ -229,6 +266,22 @@ static const struct irq_domain_ops sun6i_r_intc_domain_ops = { .free = irq_domain_free_irqs_common, }; +static int sun6i_r_intc_suspend(void) +{ + u32 buf[BITS_TO_U32(max(SUN6I_NR_TOP_LEVEL_IRQS, SUN6I_NR_MUX_BITS))]; + int i; + + /* Wake IRQs are enabled during system sleep and shutdown. */ + bitmap_to_arr32(buf, wake_irq_enabled, SUN6I_NR_TOP_LEVEL_IRQS); + for (i = 0; i < BITS_TO_U32(SUN6I_NR_TOP_LEVEL_IRQS); ++i) + writel_relaxed(buf[i], base + SUN6I_IRQ_ENABLE(i)); + bitmap_to_arr32(buf, wake_mux_enabled, SUN6I_NR_MUX_BITS); + for (i = 0; i < BITS_TO_U32(SUN6I_NR_MUX_BITS); ++i) + writel_relaxed(buf[i], base + SUN6I_MUX_ENABLE(i)); + + return 0; +} + static void sun6i_r_intc_resume(void) { int i; @@ -239,8 +292,20 @@ static void sun6i_r_intc_resume(void) writel_relaxed(0, base + SUN6I_IRQ_ENABLE(i)); } +static void sun6i_r_intc_shutdown(void) +{ + sun6i_r_intc_suspend(); +} + +static struct syscore_ops sun6i_r_intc_syscore_ops = { + .suspend = sun6i_r_intc_suspend, + .resume = sun6i_r_intc_resume, + .shutdown = sun6i_r_intc_shutdown, +}; + static int __init sun6i_r_intc_init(struct device_node *node, - struct device_node *parent) + struct device_node *parent, + const struct sun6i_r_intc_variant *v) { struct irq_domain *domain, *parent_domain; struct of_phandle_args nmi_parent; @@ -256,6 +321,9 @@ static int __init sun6i_r_intc_init(struct device_node *node, return -EINVAL; nmi_hwirq = nmi_parent.args[1]; + bitmap_set(wake_irq_enabled, v->first_mux_irq, v->nr_mux_irqs); + bitmap_from_arr32(wake_mux_valid, v->mux_valid, SUN6I_NR_MUX_BITS); + parent_domain = irq_find_host(parent); if (!parent_domain) { pr_err("%pOF: Failed to obtain parent domain\n", node); @@ -276,9 +344,36 @@ static int __init sun6i_r_intc_init(struct device_node *node, return -ENOMEM; } + register_syscore_ops(&sun6i_r_intc_syscore_ops); + sun6i_r_intc_ack_nmi(); sun6i_r_intc_resume(); return 0; } -IRQCHIP_DECLARE(sun6i_r_intc, "allwinner,sun6i-a31-r-intc", sun6i_r_intc_init); + +static const struct sun6i_r_intc_variant sun6i_a31_r_intc_variant __initconst = { + .first_mux_irq = 19, + .nr_mux_irqs = 13, + .mux_valid = { 0xffffffff, 0xfff80000, 0xffffffff, 0x0000000f }, +}; + +static int __init sun6i_a31_r_intc_init(struct device_node *node, + struct device_node *parent) +{ + return sun6i_r_intc_init(node, parent, &sun6i_a31_r_intc_variant); +} +IRQCHIP_DECLARE(sun6i_a31_r_intc, "allwinner,sun6i-a31-r-intc", sun6i_a31_r_intc_init); + +static const struct sun6i_r_intc_variant sun50i_h6_r_intc_variant __initconst = { + .first_mux_irq = 21, + .nr_mux_irqs = 16, + .mux_valid = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff }, +}; + +static int __init sun50i_h6_r_intc_init(struct device_node *node, + struct device_node *parent) +{ + return sun6i_r_intc_init(node, parent, &sun50i_h6_r_intc_variant); +} +IRQCHIP_DECLARE(sun50i_h6_r_intc, "allwinner,sun50i-h6-r-intc", sun50i_h6_r_intc_init); From patchwork Mon Jan 18 05:50:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 365686 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 326B1C433E6 for ; Mon, 18 Jan 2021 05:53:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 05CA222512 for ; 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Mon, 18 Jan 2021 00:50:43 -0500 (EST) From: Samuel Holland To: Thomas Gleixner , Marc Zyngier , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec Cc: Ondrej Jirman , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Samuel Holland Subject: [PATCH v5 06/10] ARM: dts: sunxi: Use the new r_intc binding Date: Sun, 17 Jan 2021 23:50:36 -0600 Message-Id: <20210118055040.21910-7-samuel@sholland.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210118055040.21910-1-samuel@sholland.org> References: <20210118055040.21910-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The binding of R_INTC was updated to allow specifying interrupts other than the external NMI, since routing those interrupts through the R_INTC driver allows using them for wakeup. Update the device trees to use the new binding. Acked-by: Maxime Ripard Signed-off-by: Samuel Holland --- arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +- arch/arm/boot/dts/sun6i-a31-m9.dts | 2 +- arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts | 2 +- arch/arm/boot/dts/sun6i-a31.dtsi | 2 +- arch/arm/boot/dts/sun6i-a31s-primo81.dts | 2 +- arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi | 2 +- arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 2 +- arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts | 2 +- arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi | 2 +- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +- arch/arm/boot/dts/sun8i-a33-olinuxino.dts | 2 +- arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 2 +- arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 4 ++-- arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 4 ++-- arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 4 ++-- arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 4 ++-- arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +- arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts | 2 +- arch/arm/boot/dts/sun8i-r16-parrot.dts | 2 +- arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi | 2 +- 20 files changed, 24 insertions(+), 24 deletions(-) diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts index 486cec6f71e0..236ebfc06192 100644 --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts @@ -227,7 +227,7 @@ axp22x: pmic@68 { compatible = "x-powers,axp221"; reg = <0x68>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; x-powers,drive-vbus-en; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts index 6aeb5a9696f7..2436b13cbce1 100644 --- a/arch/arm/boot/dts/sun6i-a31-m9.dts +++ b/arch/arm/boot/dts/sun6i-a31-m9.dts @@ -116,7 +116,7 @@ axp22x: pmic@68 { compatible = "x-powers,axp221"; reg = <0x68>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts index 6c6c1bd22bf6..ce712bdd8cd0 100644 --- a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts +++ b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts @@ -116,7 +116,7 @@ axp22x: pmic@68 { compatible = "x-powers,axp221"; reg = <0x68>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 6a733a36d34a..faf85c5f4e1e 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -1308,7 +1308,7 @@ rtc: rtc@1f00000 { r_intc: interrupt-controller@1f00c00 { compatible = "allwinner,sun6i-a31-r-intc"; interrupt-controller; - #interrupt-cells = <2>; + #interrupt-cells = <3>; reg = <0x01f00c00 0x400>; interrupts = ; }; diff --git a/arch/arm/boot/dts/sun6i-a31s-primo81.dts b/arch/arm/boot/dts/sun6i-a31s-primo81.dts index 429a165b79b2..c5c85eb44cc7 100644 --- a/arch/arm/boot/dts/sun6i-a31s-primo81.dts +++ b/arch/arm/boot/dts/sun6i-a31s-primo81.dts @@ -160,7 +160,7 @@ axp22x: pmic@68 { compatible = "x-powers,axp221"; reg = <0x68>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; x-powers,drive-vbus-en; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi index 7455c0db4a8a..227ad489731c 100644 --- a/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi +++ b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi @@ -79,7 +79,7 @@ axp22x: pmic@68 { compatible = "x-powers,axp221"; reg = <0x68>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts index 0d124a4a7cf2..abf742c4d47e 100644 --- a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts +++ b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts @@ -149,7 +149,7 @@ axp22x: pmic@68 { compatible = "x-powers,axp221"; reg = <0x68>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; eldoin-supply = <®_dcdc1>; x-powers,drive-vbus-en; }; diff --git a/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts index cadc45255d7b..0b61f5368d44 100644 --- a/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts +++ b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts @@ -99,7 +99,7 @@ axp22x: pmic@68 { compatible = "x-powers,axp221"; reg = <0x68>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; }; }; diff --git a/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi index 6bf3fbdd738f..f38d19c6be8c 100644 --- a/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi +++ b/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi @@ -80,7 +80,7 @@ axp22x: pmic@68 { compatible = "x-powers,axp221"; reg = <0x68>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; drivevbus-supply = <®_vcc5v0>; x-powers,drive-vbus-en; }; diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index a42fac676b31..a84c90a660ca 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -719,7 +719,7 @@ rtc: rtc@1f00000 { r_intc: interrupt-controller@1f00c00 { compatible = "allwinner,sun6i-a31-r-intc"; interrupt-controller; - #interrupt-cells = <2>; + #interrupt-cells = <3>; reg = <0x01f00c00 0x400>; interrupts = ; }; diff --git a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts index 2c8db949f99f..810fada3db00 100644 --- a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts +++ b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts @@ -99,7 +99,7 @@ axp22x: pmic@3a3 { compatible = "x-powers,axp223"; reg = <0x3a3>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; eldoin-supply = <®_dcdc1>; x-powers,drive-vbus-en; }; diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts index f18ae8a1976e..66fec9a8c777 100644 --- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts +++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts @@ -165,7 +165,7 @@ axp22x: pmic@3a3 { compatible = "x-powers,axp223"; reg = <0x3a3>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; eldoin-supply = <®_dcdc1>; }; }; diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts b/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts index 9c006fc18821..c31c97d16024 100644 --- a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts +++ b/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts @@ -122,7 +122,7 @@ axp81x: pmic@3a3 { compatible = "x-powers,axp818", "x-powers,axp813"; reg = <0x3a3>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; eldoin-supply = <®_dcdc1>; swin-supply = <®_dcdc1>; }; @@ -142,7 +142,7 @@ ac100_codec: codec { ac100_rtc: rtc { compatible = "x-powers,ac100-rtc"; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; clocks = <&ac100_codec>; #clock-cells = <1>; clock-output-names = "cko1_rtc", diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts index 431f70234d36..2e8e1134a852 100644 --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts @@ -203,7 +203,7 @@ axp81x: pmic@3a3 { compatible = "x-powers,axp813"; reg = <0x3a3>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; eldoin-supply = <®_dcdc1>; fldoin-supply = <®_dcdc5>; swin-supply = <®_dcdc1>; @@ -225,7 +225,7 @@ ac100_codec: codec { ac100_rtc: rtc { compatible = "x-powers,ac100-rtc"; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; clocks = <&ac100_codec>; #clock-cells = <1>; clock-output-names = "cko1_rtc", diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts index d8326a5c681d..f15eb782bca3 100644 --- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts +++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts @@ -239,7 +239,7 @@ axp81x: pmic@3a3 { compatible = "x-powers,axp818", "x-powers,axp813"; reg = <0x3a3>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; eldoin-supply = <®_dcdc1>; swin-supply = <®_dcdc1>; x-powers,drive-vbus-en; @@ -260,7 +260,7 @@ ac100_codec: codec { ac100_rtc: rtc { compatible = "x-powers,ac100-rtc"; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; clocks = <&ac100_codec>; #clock-cells = <1>; clock-output-names = "cko1_rtc", diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts index bfc9bb277a49..1a146e200cde 100644 --- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts +++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts @@ -263,7 +263,7 @@ axp81x: pmic@3a3 { compatible = "x-powers,axp813"; reg = <0x3a3>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; swin-supply = <®_dcdc1>; x-powers,drive-vbus-en; }; @@ -283,7 +283,7 @@ ac100_codec: codec { ac100_rtc: rtc { compatible = "x-powers,ac100-rtc"; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; clocks = <&ac100_codec>; #clock-cells = <1>; clock-output-names = "cko1_rtc", diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index c010b27fdb6a..0fce227f56d4 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -1114,7 +1114,7 @@ r_intc: interrupt-controller@1f00c00 { compatible = "allwinner,sun8i-a83t-r-intc", "allwinner,sun6i-a31-r-intc"; interrupt-controller; - #interrupt-cells = <2>; + #interrupt-cells = <3>; reg = <0x01f00c00 0x400>; interrupts = ; }; diff --git a/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts index 09ec68c64535..8e8ecdcd3a83 100644 --- a/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts +++ b/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts @@ -164,7 +164,7 @@ axp22x: pmic@3a3 { compatible = "x-powers,axp223"; reg = <0x3a3>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; eldoin-supply = <®_dcdc1>; x-powers,drive-vbus-en; }; diff --git a/arch/arm/boot/dts/sun8i-r16-parrot.dts b/arch/arm/boot/dts/sun8i-r16-parrot.dts index 9cdc2ed84847..de4bce5f89a8 100644 --- a/arch/arm/boot/dts/sun8i-r16-parrot.dts +++ b/arch/arm/boot/dts/sun8i-r16-parrot.dts @@ -165,7 +165,7 @@ axp22x: pmic@3a3 { compatible = "x-powers,axp223"; reg = <0x3a3>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; drivevbus-supply = <®_vcc5v0>; x-powers,drive-vbus-en; }; diff --git a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi index 8175bf307eb1..d71ea3637850 100644 --- a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi +++ b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi @@ -93,7 +93,7 @@ axp22x: pmic@3a3 { compatible = "x-powers,axp223"; reg = <0x3a3>; interrupt-parent = <&r_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; eldoin-supply = <®_dcdc1>; drivevbus-supply = <®_vcc5v0>; x-powers,drive-vbus-en; From patchwork Mon Jan 18 05:50:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 365684 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7242C433E0 for ; Mon, 18 Jan 2021 05:54:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AB17B22512 for ; Mon, 18 Jan 2021 05:54:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732279AbhARFyF (ORCPT ); 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Mon, 18 Jan 2021 00:50:44 -0500 (EST) From: Samuel Holland To: Thomas Gleixner , Marc Zyngier , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec Cc: Ondrej Jirman , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Samuel Holland Subject: [PATCH v5 08/10] ARM: dts: sunxi: Move wakeup-capable IRQs to r_intc Date: Sun, 17 Jan 2021 23:50:38 -0600 Message-Id: <20210118055040.21910-9-samuel@sholland.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210118055040.21910-1-samuel@sholland.org> References: <20210118055040.21910-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org All IRQs that can be used to wake up the system must be routed through r_intc, so they are visible to firmware while the system is suspended. In addition to the external NMI input, which is already routed through r_intc, these include PIO and R_PIO (gpio-keys), the LRADC, and the RTC. Acked-by: Maxime Ripard Signed-off-by: Samuel Holland --- arch/arm/boot/dts/sun6i-a31.dtsi | 4 ++++ arch/arm/boot/dts/sun8i-a23-a33.dtsi | 4 ++++ arch/arm/boot/dts/sun8i-a83t.dtsi | 3 +++ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 +++ 4 files changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index faf85c5f4e1e..50324688c28a 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -611,6 +611,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { compatible = "allwinner,sun6i-a31-pinctrl"; reg = <0x01c20800 0x400>; + interrupt-parent = <&r_intc>; interrupts = , , , @@ -802,6 +803,7 @@ i2s1: i2s@1c22400 { lradc: lradc@1c22800 { compatible = "allwinner,sun4i-a10-lradc-keys"; reg = <0x01c22800 0x100>; + interrupt-parent = <&r_intc>; interrupts = ; status = "disabled"; }; @@ -1299,6 +1301,7 @@ rtc: rtc@1f00000 { #clock-cells = <1>; compatible = "allwinner,sun6i-a31-rtc"; reg = <0x01f00000 0x54>; + interrupt-parent = <&r_intc>; interrupts = , ; clocks = <&osc32k>; @@ -1383,6 +1386,7 @@ ir: ir@1f02000 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun6i-a31-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = , ; clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index a84c90a660ca..4461d5098b20 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -338,6 +338,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { /* compatible gets set in SoC specific dtsi file */ reg = <0x01c20800 0x400>; + interrupt-parent = <&r_intc>; /* interrupts get set in SoC specific dtsi file */ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; @@ -473,6 +474,7 @@ pwm: pwm@1c21400 { lradc: lradc@1c22800 { compatible = "allwinner,sun4i-a10-lradc-keys"; reg = <0x01c22800 0x100>; + interrupt-parent = <&r_intc>; interrupts = ; status = "disabled"; }; @@ -709,6 +711,7 @@ drc0_out_tcon0: endpoint { rtc: rtc@1f00000 { compatible = "allwinner,sun8i-a23-rtc"; reg = <0x01f00000 0x400>; + interrupt-parent = <&r_intc>; interrupts = , ; clock-output-names = "osc32k", "osc32k-out"; @@ -805,6 +808,7 @@ r_i2c: i2c@1f02400 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-a23-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = ; clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 0fce227f56d4..2c05e296b3d8 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -708,6 +708,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { compatible = "allwinner,sun8i-a83t-pinctrl"; + interrupt-parent = <&r_intc>; interrupts = , , ; @@ -1150,6 +1151,7 @@ r_cir: ir@1f02000 { r_lradc: lradc@1f03c00 { compatible = "allwinner,sun8i-a83t-r-lradc"; reg = <0x01f03c00 0x100>; + interrupt-parent = <&r_intc>; interrupts = ; status = "disabled"; }; @@ -1157,6 +1159,7 @@ r_lradc: lradc@1f03c00 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-a83t-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = ; clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc16Md512>; diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 4bf25c5b873e..c7428df9469e 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -395,6 +395,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { /* compatible is in per SoC .dtsi file */ reg = <0x01c20800 0x400>; + interrupt-parent = <&r_intc>; interrupts = , ; clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; @@ -852,6 +853,7 @@ hdmi_phy: hdmi-phy@1ef0000 { rtc: rtc@1f00000 { /* compatible is in per SoC .dtsi file */ reg = <0x01f00000 0x400>; + interrupt-parent = <&r_intc>; interrupts = , ; clock-output-names = "osc32k", "osc32k-out", "iosc"; @@ -909,6 +911,7 @@ r_i2c: i2c@1f02400 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-h3-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = ; clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; From patchwork Mon Jan 18 05:50:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 365685 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A460EC433E0 for ; Mon, 18 Jan 2021 05:53:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 79F1B2251F for ; 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Mon, 18 Jan 2021 00:50:45 -0500 (EST) From: Samuel Holland To: Thomas Gleixner , Marc Zyngier , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec Cc: Ondrej Jirman , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Samuel Holland Subject: [PATCH v5 10/10] arm64: dts: allwinner: Move wakeup-capable IRQs to r_intc Date: Sun, 17 Jan 2021 23:50:40 -0600 Message-Id: <20210118055040.21910-11-samuel@sholland.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210118055040.21910-1-samuel@sholland.org> References: <20210118055040.21910-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org All IRQs that can be used to wake up the system must be routed through r_intc, so they are visible to firmware while the system is suspended. In addition to the external NMI input, which is already routed through r_intc, these include PIO and R_PIO (gpio-keys), the LRADC, and the RTC. Acked-by: Maxime Ripard Signed-off-by: Samuel Holland --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 3 +++ 2 files changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 5bf9d61fab12..5b30e6c1fa05 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -648,6 +648,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { compatible = "allwinner,sun50i-a64-pinctrl"; reg = <0x01c20800 0x400>; + interrupt-parent = <&r_intc>; interrupts = , , ; @@ -818,6 +819,7 @@ lradc: lradc@1c21800 { compatible = "allwinner,sun50i-a64-lradc", "allwinner,sun8i-a83t-r-lradc"; reg = <0x01c21800 0x400>; + interrupt-parent = <&r_intc>; interrupts = ; status = "disabled"; }; @@ -1208,6 +1210,7 @@ rtc: rtc@1f00000 { compatible = "allwinner,sun50i-a64-rtc", "allwinner,sun8i-h3-rtc"; reg = <0x01f00000 0x400>; + interrupt-parent = <&r_intc>; interrupts = , ; clock-output-names = "osc32k", "osc32k-out", "iosc"; @@ -1279,6 +1282,7 @@ r_pwm: pwm@1f03800 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun50i-a64-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = ; clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; clock-names = "apb", "hosc", "losc"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 15babb635cf7..4af06f49daa7 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -294,6 +294,7 @@ pwm: pwm@300a000 { pio: pinctrl@300b000 { compatible = "allwinner,sun50i-h6-pinctrl"; reg = <0x0300b000 0x400>; + interrupt-parent = <&r_intc>; interrupts = , , , @@ -902,6 +903,7 @@ tcon_tv_out_tcon_top: endpoint@1 { rtc: rtc@7000000 { compatible = "allwinner,sun50i-h6-rtc"; reg = <0x07000000 0x400>; + interrupt-parent = <&r_intc>; interrupts = , ; clock-output-names = "osc32k", "osc32k-out", "iosc"; @@ -937,6 +939,7 @@ r_intc: interrupt-controller@7021000 { r_pio: pinctrl@7022000 { compatible = "allwinner,sun50i-h6-r-pinctrl"; reg = <0x07022000 0x400>; + interrupt-parent = <&r_intc>; interrupts = , ; clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>;