From patchwork Tue Jan 26 12:45:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 370630 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp4966210jam; Tue, 26 Jan 2021 05:15:27 -0800 (PST) X-Google-Smtp-Source: ABdhPJwbeZ9jbEPTtaoANbU1xx/z7Ov2YffEKCqraQNC+UpUx6qJ+w6A74oqm3FPxyGpDbEg2Bbf X-Received: by 2002:a50:ff11:: with SMTP id a17mr4604948edu.63.1611666927130; Tue, 26 Jan 2021 05:15:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611666927; cv=none; d=google.com; s=arc-20160816; b=A2xsXV8L2HJW6nHabBJ20zyg+r2VvMuPiVDP/f8/HkgH/MqWXmcmeJa7sqMZOJgZ2r lwr5dG8x0iSDcUHQe26b8ITvXni0FZPfeE3wLLZlYnEd3TyIMIsQAQSt+iOw9+TO5QCx VXixUWjz4r6NhQtPEhYS6MaDif4/XoYzNODwhKz3Ovfx1UFDH8O+JMNb1L26D7QU30mc CJBKnkV5sIaQMZEoZs1qmUr7hJBCdI3MuhPDsyljcxgHHrw2G/+v3gD3eU2Yq+dB/afX /1w/aYtTqET6u8Xa3jo/JAP8RwpRYyhlq+HgtU9pqQ4HyuctMPmKOva+eljFW+idkZfe kTAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=HHkd09sGQoktrv+rkNaMJyxZ3/BBMappx4i1qFyA51o=; b=Yd9HrwbcbQUPHQk0I8x2tFOeYiAnMFTdZszVSVCnQ8CFYFvAJRdPcJFuLr/8TGSjFt gZ7530xkxejKOAL4O8CG53tVY0zCDUMuat1XMkcD24A9WsAmWzVnRB0Fphl1pnNmJGC7 K4sU7FFNiVMLvdSdYPk1ZIfeqY9P8lpAUNCXWMS49T6ZE5raptXzh0+r8HKZpuKSjnPR 6CQliLr8rVa2yJ85hJsJaY5hivUKTCrLXm14OnCbQxCrqZfctFurqc0ildqOcr7kyHr6 y3DsJEzqDWa2wwbUrCKLJxmJNs7uAT6bsAFFFnkSPOpLvLx/aeu253e7TzIghrVlSzZv OnCw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TnYbFNbQ; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h4si8097935edv.124.2021.01.26.05.15.26; Tue, 26 Jan 2021 05:15:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TnYbFNbQ; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2403869AbhAZNPP (ORCPT + 3 others); Tue, 26 Jan 2021 08:15:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391898AbhAZMrW (ORCPT ); Tue, 26 Jan 2021 07:47:22 -0500 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70E2BC0698C4 for ; Tue, 26 Jan 2021 04:45:48 -0800 (PST) Received: by mail-wm1-x32c.google.com with SMTP id y187so2634257wmd.3 for ; Tue, 26 Jan 2021 04:45:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HHkd09sGQoktrv+rkNaMJyxZ3/BBMappx4i1qFyA51o=; b=TnYbFNbQymHArsvv6uMgb5tO3NV5ZnbJxvZzMuj+1YlGF4WEMMgKVeViAGi6q+qoFc rYEHRkr8wrhzIEJ0KYFizjHBZBjPUmAsSX6B5wGaskQglrH5c5UrsbeGazcmS4NCeKZN TSs37HB8TICrWogbEReV4KE2rUwYlSEIGChJJpEOQRJ14zYlsqmuH2ASFKwrrazTfWr8 VILbJQ0gzu9SJzW4ozcjvP5X86pRPWJ3yrCL9TdRNXG/eX+lfARbzE0B34srRPyLEGZI hpdL8SOAnlS8c9NJf96iFNX4CEopinC21YSoHPMIAmS1K3vJl9xlXnezvOkzEHpxNqRb N4ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HHkd09sGQoktrv+rkNaMJyxZ3/BBMappx4i1qFyA51o=; b=PqmL4wDDrT1LBB8Lfew2DtmvNcxiZ8A4/fyZYotswY+akSm2tO+qJR2mmbnPvKv/XZ rRVNVQ4mQgEaEVV3ams8+lQoIHFdgVAnQLnukXvp4rs1N1m2B+6A96DyTLowxFbj8t8H PRZ9lXa/7mOPr+X0i9IMOe75w1HxYBsOqHEAJulfbZ4tb9Vy/Z9eEi59KkEiNQZvNcd4 QlRc80s2SLJ50C+yzhmoiOxbx6wPCOVyFEYxj0gCoAeZIK9MtfDbkACO6mUjCKiLJ5IU ZwcZV9LxLRQS38+PPowouTF7RzkZDbn29LxCWw6dUwvmF0uyy+RMPqw27I8gvC/Yde3Y sYWA== X-Gm-Message-State: AOAM532ZqSMbbLRNL+LYSxum7GxmPvu1WoAg73ktCSMR4VcYiUxCwYA4 XPozGmpp8aPQi0SYUagvrGpECA== X-Received: by 2002:a1c:9648:: with SMTP id y69mr4463242wmd.40.1611665147239; Tue, 26 Jan 2021 04:45:47 -0800 (PST) Received: from dell.default ([91.110.221.188]) by smtp.gmail.com with ESMTPSA id i131sm3263073wmi.25.2021.01.26.04.45.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 04:45:46 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Cc: linux-kernel@vger.kernel.org, Tero Kristo , Michael Turquette , Stephen Boyd , Richard Woodruff , linux-omap@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH 02/21] clk: ti: clkt_dpll: Fix some kernel-doc misdemeanours Date: Tue, 26 Jan 2021 12:45:21 +0000 Message-Id: <20210126124540.3320214-3-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210126124540.3320214-1-lee.jones@linaro.org> References: <20210126124540.3320214-1-lee.jones@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Fixes the following W=1 kernel build warning(s): drivers/clk/ti/clkt_dpll.c:284: warning: Function parameter or member 'hw' not described in 'omap2_dpll_round_rate' drivers/clk/ti/clkt_dpll.c:284: warning: Function parameter or member 'parent_rate' not described in 'omap2_dpll_round_rate' drivers/clk/ti/clkt_dpll.c:284: warning: Excess function parameter 'clk' description in 'omap2_dpll_round_rate' Cc: Tero Kristo Cc: Michael Turquette Cc: Stephen Boyd Cc: Richard Woodruff Cc: linux-omap@vger.kernel.org Cc: linux-clk@vger.kernel.org Signed-off-by: Lee Jones --- drivers/clk/ti/clkt_dpll.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.25.1 diff --git a/drivers/clk/ti/clkt_dpll.c b/drivers/clk/ti/clkt_dpll.c index 87ece6cd4226b..dfaa4d1f0b64b 100644 --- a/drivers/clk/ti/clkt_dpll.c +++ b/drivers/clk/ti/clkt_dpll.c @@ -269,8 +269,9 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk) /** * omap2_dpll_round_rate - round a target rate for an OMAP DPLL - * @clk: struct clk * for a DPLL + * @hw: struct clk_hw containing the struct clk * for a DPLL * @target_rate: desired DPLL clock rate + * @parent_rate: parent's DPLL clock rate * * Given a DPLL and a desired target rate, round the target rate to a * possible, programmable rate for this DPLL. Attempts to select the From patchwork Tue Jan 26 12:45:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 370631 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp4971701jam; Tue, 26 Jan 2021 05:22:01 -0800 (PST) X-Google-Smtp-Source: ABdhPJyZhjq6aPmNFftRO84jG6JJ6HhQh5PKnItezh8s6ZXkG8ryQDIfo9ZZc8btK4ZmFUAwcmfy X-Received: by 2002:a50:d604:: with SMTP id x4mr4599148edi.64.1611667321118; Tue, 26 Jan 2021 05:22:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611667321; cv=none; d=google.com; s=arc-20160816; b=OTvTpbpJy3/rr+8gB9fgd9F3A2oSFYa5q49jMyxATpODMGUx0OG+lp7VHQrj5x7MMI vBy4oi2+sWd/GSysRgZI3/MhNo1KKXkIiefrO2TBx/lPASELfu3e5kOSXS5msE9Aqtu2 AVyD3zvGpbL35MXJh4vwE4gwN5XrcLGUkJ5TVSPjKi7u5mTYjIXaLNr7m0DBFrVaj5Xa kzyIbnTLxZo+WWb2VMFWXOhyw9uQWkCsXnnze4JlOFs02ByrYTBjynpXyBkqP7nilPEy LgTmQ4VtsRV3jUupsr00MYm0DOMOtofL1bu/S2u3ioCuttHy32EW0QPhOpg5Tx0JGE5R /vAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WIsLlUBr7Kh7BZjK4/tzaEQaD5gOhXUmlIRcSEzBbI8=; b=Ixa4QBa4VDsojC6nDSrwYafh5wyqjnkZn5zgOhGyRnW7smKFUQV5rsOMz+ruC9Xdh6 lEoLbTyv0B9DM4ggwVa18+e0R+Ur5WbZtL1H0EBaoZhizdFBf8W9+FGKqmPE53c+1xW3 0BrgZJYIVUFzc6HeqXc86vZ26KI/GMBgS3gTJEbdQFeEjokxkLVmoN0IKwUSAEZPlkiM OSeWia9aHmMIPfPQt1MykR6NFY4IzjA/xeCeIgdlksJD4xjZ4WE9ZQbR1hQN1ZxVfNy7 8CczCFJ4lgTTgnhuT7ylX2crRWuNDvAsveeHU17KlaRJUdCM6pSesUIaZ9/zuApw79mD XfUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KBIuvuxW; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 26 Jan 2021 04:45:48 -0800 (PST) Received: from dell.default ([91.110.221.188]) by smtp.gmail.com with ESMTPSA id i131sm3263073wmi.25.2021.01.26.04.45.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 04:45:47 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Cc: linux-kernel@vger.kernel.org, Tero Kristo , Michael Turquette , Stephen Boyd , linux-omap@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH 03/21] clk: ti: dpll3xxx: Fix some kernel-doc headers and promote other worthy ones Date: Tue, 26 Jan 2021 12:45:22 +0000 Message-Id: <20210126124540.3320214-4-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210126124540.3320214-1-lee.jones@linaro.org> References: <20210126124540.3320214-1-lee.jones@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Fixes the following W=1 kernel build warning(s): drivers/clk/ti/dpll3xxx.c:414: warning: Function parameter or member 'hw' not described in 'omap3_dpll_recalc' drivers/clk/ti/dpll3xxx.c:414: warning: Function parameter or member 'parent_rate' not described in 'omap3_dpll_recalc' drivers/clk/ti/dpll3xxx.c:414: warning: Excess function parameter 'clk' description in 'omap3_dpll_recalc' drivers/clk/ti/dpll3xxx.c:437: warning: Function parameter or member 'hw' not described in 'omap3_noncore_dpll_enable' drivers/clk/ti/dpll3xxx.c:437: warning: Excess function parameter 'clk' description in 'omap3_noncore_dpll_enable' drivers/clk/ti/dpll3xxx.c:479: warning: Function parameter or member 'hw' not described in 'omap3_noncore_dpll_disable' drivers/clk/ti/dpll3xxx.c:479: warning: Excess function parameter 'clk' description in 'omap3_noncore_dpll_disable' drivers/clk/ti/dpll3xxx.c:755: warning: Function parameter or member 'hw' not described in 'omap3_clkoutx2_recalc' drivers/clk/ti/dpll3xxx.c:755: warning: Function parameter or member 'parent_rate' not described in 'omap3_clkoutx2_recalc' drivers/clk/ti/dpll3xxx.c:755: warning: Excess function parameter 'clk' description in 'omap3_clkoutx2_recalc' Cc: Tero Kristo Cc: Michael Turquette Cc: Stephen Boyd Cc: linux-omap@vger.kernel.org Cc: linux-clk@vger.kernel.org Signed-off-by: Lee Jones --- drivers/clk/ti/dpll3xxx.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) -- 2.25.1 diff --git a/drivers/clk/ti/dpll3xxx.c b/drivers/clk/ti/dpll3xxx.c index 2490026948b47..6097b099a5dff 100644 --- a/drivers/clk/ti/dpll3xxx.c +++ b/drivers/clk/ti/dpll3xxx.c @@ -125,7 +125,7 @@ static u16 _omap3_dpll_compute_freqsel(struct clk_hw_omap *clk, u8 n) return f; } -/* +/** * _omap3_noncore_dpll_lock - instruct a DPLL to lock and wait for readiness * @clk: pointer to a DPLL struct clk * @@ -168,7 +168,7 @@ static int _omap3_noncore_dpll_lock(struct clk_hw_omap *clk) return r; } -/* +/** * _omap3_noncore_dpll_bypass - instruct a DPLL to bypass and wait for readiness * @clk: pointer to a DPLL struct clk * @@ -204,7 +204,7 @@ static int _omap3_noncore_dpll_bypass(struct clk_hw_omap *clk) return r; } -/* +/** * _omap3_noncore_dpll_stop - instruct a DPLL to stop * @clk: pointer to a DPLL struct clk * @@ -291,7 +291,7 @@ static void _lookup_sddiv(struct clk_hw_omap *clk, u8 *sd_div, u16 m, u8 n) *sd_div = sd; } -/* +/** * _omap3_noncore_dpll_program - set non-core DPLL M,N values directly * @clk: struct clk * of DPLL to set * @freqsel: FREQSEL value to set @@ -406,7 +406,8 @@ static int omap3_noncore_dpll_program(struct clk_hw_omap *clk, u16 freqsel) /** * omap3_dpll_recalc - recalculate DPLL rate - * @clk: DPLL struct clk + * @hw: struct clk_hw containing the DPLL struct clk + * @parent_rate: clock rate of the DPLL parent * * Recalculate and propagate the DPLL rate. */ @@ -421,7 +422,7 @@ unsigned long omap3_dpll_recalc(struct clk_hw *hw, unsigned long parent_rate) /** * omap3_noncore_dpll_enable - instruct a DPLL to enter bypass or lock mode - * @clk: pointer to a DPLL struct clk + * @hw: struct clk_hw containing then pointer to a DPLL struct clk * * Instructs a non-CORE DPLL to enable, e.g., to enter bypass or lock. * The choice of modes depends on the DPLL's programmed rate: if it is @@ -470,7 +471,7 @@ int omap3_noncore_dpll_enable(struct clk_hw *hw) /** * omap3_noncore_dpll_disable - instruct a DPLL to enter low-power stop - * @clk: pointer to a DPLL struct clk + * @hw: struct clk_hw containing then pointer to a DPLL struct clk * * Instructs a non-CORE DPLL to enter low-power stop. This function is * intended for use in struct clkops. No return value. @@ -745,7 +746,8 @@ static struct clk_hw_omap *omap3_find_clkoutx2_dpll(struct clk_hw *hw) /** * omap3_clkoutx2_recalc - recalculate DPLL X2 output virtual clock rate - * @clk: DPLL output struct clk + * @hw: pointer struct clk_hw + * @parent_rate: clock rate of the DPLL parent * * Using parent clock DPLL data, look up DPLL state. If locked, set our * rate to the dpll_clk * 2; otherwise, just use dpll_clk. @@ -913,7 +915,7 @@ const struct clk_hw_omap_ops clkhwops_omap3_dpll = { * omap3_dpll4_set_rate - set rate for omap3 per-dpll * @hw: clock to change * @rate: target rate for clock - * @parent_rate: rate of the parent clock + * @parent_rate: clock rate of the DPLL parent * * Check if the current SoC supports the per-dpll reprogram operation * or not, and then do the rate change if supported. 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Tue, 26 Jan 2021 04:45:56 -0800 (PST) Received: from dell.default ([91.110.221.188]) by smtp.gmail.com with ESMTPSA id i131sm3263073wmi.25.2021.01.26.04.45.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 04:45:55 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Cc: linux-kernel@vger.kernel.org, Tero Kristo , Michael Turquette , Stephen Boyd , linux-omap@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH 10/21] clk: ti: dpll44xx: Fix some potential doc-rot Date: Tue, 26 Jan 2021 12:45:29 +0000 Message-Id: <20210126124540.3320214-11-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210126124540.3320214-1-lee.jones@linaro.org> References: <20210126124540.3320214-1-lee.jones@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Fixes the following W=1 kernel build warning(s): drivers/clk/ti/dpll44xx.c:114: warning: Function parameter or member 'hw' not described in 'omap4_dpll_regm4xen_recalc' drivers/clk/ti/dpll44xx.c:114: warning: Function parameter or member 'parent_rate' not described in 'omap4_dpll_regm4xen_recalc' drivers/clk/ti/dpll44xx.c:114: warning: Excess function parameter 'clk' description in 'omap4_dpll_regm4xen_recalc' drivers/clk/ti/dpll44xx.c:150: warning: Function parameter or member 'hw' not described in 'omap4_dpll_regm4xen_round_rate' drivers/clk/ti/dpll44xx.c:150: warning: Function parameter or member 'parent_rate' not described in 'omap4_dpll_regm4xen_round_rate' drivers/clk/ti/dpll44xx.c:150: warning: Excess function parameter 'clk' description in 'omap4_dpll_regm4xen_round_rate' Cc: Tero Kristo Cc: Michael Turquette Cc: Stephen Boyd Cc: linux-omap@vger.kernel.org Cc: linux-clk@vger.kernel.org Signed-off-by: Lee Jones --- drivers/clk/ti/dpll44xx.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.25.1 diff --git a/drivers/clk/ti/dpll44xx.c b/drivers/clk/ti/dpll44xx.c index 89c3ed1a24b82..3fc2cab69a3fe 100644 --- a/drivers/clk/ti/dpll44xx.c +++ b/drivers/clk/ti/dpll44xx.c @@ -102,7 +102,8 @@ static void omap4_dpll_lpmode_recalc(struct dpll_data *dd) /** * omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit - * @clk: struct clk * of the DPLL to compute the rate for + * @hw: pointer to the clock to compute the rate for + * @parent_rate: clock rate of the DPLL parent * * Compute the output rate for the OMAP4 DPLL represented by @clk. * Takes the REGM4XEN bit into consideration, which is needed for the @@ -134,8 +135,9 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw, /** * omap4_dpll_regm4xen_round_rate - round DPLL rate, considering REGM4XEN bit - * @clk: struct clk * of the DPLL to round a rate for + * @hw: struct hw_clk containing the struct clk * of the DPLL to round a rate for * @target_rate: the desired rate of the DPLL + * @parent_rate: clock rate of the DPLL parent * * Compute the rate that would be programmed into the DPLL hardware * for @clk if set_rate() were to be provided with the rate