Patch Metrics

There are 40987 patches submitted by members of this team, and 10509 of those have been accepted upstream.

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Show patches with: Archived = No       |   40987 patches
« 1 2 3 4 … 409 410 »
Patch Series S/W/F Date Submitter Delegate State
[RESEND,v2,17/19] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,16/19] hw/net/xilinx_ethlite: Map TX_CTRL as MMIO hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,15/19] hw/net/xilinx_ethlite: Map TX_GIE as MMIO hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,14/19] hw/net/xilinx_ethlite: Map TX_LEN as MMIO hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,13/19] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,12/19] hw/net/xilinx_ethlite: Access TX_CTRL register for each port hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,11/19] hw/net/xilinx_ethlite: Access TX_LEN register for each port hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,10/19] hw/net/xilinx_ethlite: Access TX_GIE register for each port hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,09/19] hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,08/19] hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,07/19] hw/net/xilinx_ethlite: Rename rxbuf -> port_index hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,06/19] hw/net/xilinx_ethlite: Map MDIO registers (as unimplemented) hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,05/19] hw/net/xilinx_ethlite: Correct maximum RX buffer size hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,04/19] hw/net/xilinx_ethlite: Update QOM style hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,03/19] hw/net/xilinx_ethlite: Remove unuseful debug logs hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,02/19] hw/net/xilinx_ethlite: Convert some debug logs to trace events hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[RESEND,v2,01/19] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé New
[v2,04/19] hw/net/xilinx_ethlite: Update QOM style hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé Superseded
[v2,03/19] hw/net/xilinx_ethlite: Remove unuseful debug logs hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé Superseded
[v2,02/19] hw/net/xilinx_ethlite: Convert some debug logs to trace events hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé Superseded
[v2,01/19] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-14 Philippe Mathieu-Daudé Superseded
[v2,54/54] accel/tcg: Return CPUTLBEntryTree from tlb_set_page_full accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,53/54] accel/tcg: Merge tlb_fill_align into callers accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,52/54] accel/tcg: Unexport tlb_set_page* accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,51/54] accel/tcg: Drop TCGCPUOps.tlb_fill accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,50/54] target/xtensa: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,49/54] target/tricore: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,48/54] target/sparc: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,47/54] target/sh4: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,46/54] target/s390x: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,45/54] target/rx: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,44/54] target/riscv: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,43/54] target/ppc: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,42/54] target/openrisc: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,41/54] target/mips: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,40/54] target/microblaze: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,39/54] target/m68k: Do not call tlb_set_page in helper_ptest accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,38/54] target/m68k: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,37/54] target/loongarch: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,36/54] target/i386: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,35/54] target/avr: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,34/54] target/alpha: Convert to TCGCPUOps.tlb_fill_align accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,33/54] accel/tcg: Remove CPUTLBDesc.fulltlb accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,32/54] accel/tcg: Link CPUTLBEntry to CPUTLBEntryTree accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,31/54] accel/tcg: Always use IntervalTree for code lookups accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,30/54] accel/tcg: Merge mmu_lookup1 into mmu_lookup accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,29/54] accel/tcg: Partially unify MMULookupPageData and TLBLookupOutput accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,28/54] accel/tcg: Introduce tlb_lookup accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,27/54] accel/tcg: Return CPUTLBEntryFull not pointer in probe_access_internal accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,26/54] accel/tcg: Return CPUTLBEntryFull not pointer in probe_access_full accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,25/54] accel/tcg: Return CPUTLBEntryFull not pointer in probe_access_full_mmu accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,24/54] accel/tcg: Preserve tlb flags in tlb_set_compare accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,23/54] accel/tcg: Check original prot bits for read in atomic_mmu_lookup accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,22/54] accel/tcg: Call cpu_ld*_code_mmu from cpu_ld*_code accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,21/54] accel/tcg: Delay plugin adjustment in probe_access_internal accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,20/54] include/exec/tlb-common: Move CPUTLBEntryFull from hw/core/cpu.h accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,19/54] accel/tcg: Remove tlb_n_used_entries_inc accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,18/54] accel/tcg: Remove the victim tlb accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,17/54] accel/tcg: Replace victim_tlb_hit with tlbtree_hit accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,16/54] accel/tcg: Pass full addr to victim_tlb_hit accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,15/54] accel/tcg: Use tlb_hit_page in victim_tlb_hit accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,14/54] accel/tcg: Process IntervalTree entries in tlb_set_dirty accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,13/54] accel/tcg: Process IntervalTree entries in tlb_reset_dirty accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,12/54] accel/tcg: Remove IntervalTree entries in tlb_flush_range_locked accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,11/54] accel/tcg: Remove IntervalTree entry in tlb_flush_page_locked accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,10/54] accel/tcg: Populate IntervalTree in tlb_set_page_full accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,09/54] accel/tcg: Add IntervalTreeRoot to CPUTLBDesc accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,08/54] accel/tcg: Flush entire tlb when a masked range wraps accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,07/54] accel/tcg: Assert bits in range in tlb_flush_range_by_mmuidx* accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,06/54] accel/tcg: Assert non-zero length in tlb_flush_range_by_mmuidx* accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,05/54] accel/tcg: Fix flags usage in mmu_lookup1, atomic_mmu_lookup accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,04/54] accel/tcg: Split out tlbfast_flush_range_locked accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,03/54] accel/tcg: Split out tlbfast_{index,entry} accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,02/54] accel/tcg: Split out tlbfast_flush_locked accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,01/54] util/interval-tree: Introduce interval_tree_free_nodes accel/tcg: Convert victim tlb to IntervalTree --- 2024-11-14 Richard Henderson New
[v2,2/2] net: mark struct ip_header as QEMU_PACKED net: Make ip_header struct QEMU_PACKED --- 2024-11-14 Peter Maydell Superseded
[v2,1/2] hw/net/virtio-net.c: Don't assume IP length field is aligned net: Make ip_header struct QEMU_PACKED --- 2024-11-14 Peter Maydell New
[24/24] exec: Move 'ram_addr.h' header under sysemu/ namespace exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[23/24] exec/memory: Move qemu_map_ram_ptr() declaration to 'exec/ram_addr.h' exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[22/24] exec/cpu-common: Move ram_addr_t related methods to 'exec/ram_addr.h' exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[21/24] exec: Extract CPU physical memory API to 'sysemu/physmem-target.h' exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[20/24] exec: Declare tlb_vaddr_to_host() in 'exec/cputlb.h' exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[19/24] exec: Declare tlb_hit*() in 'exec/cputlb.h' exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[18/24] exec: Declare tlb_flush*() in 'exec/cputlb.h' exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[17/24] exec: Declare tlb_set_page() in 'exec/cputlb.h' exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[16/24] exec: Declare tlb_set_page_with_attrs() in 'exec/cputlb.h' exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[15/24] exec: Declare tlb_set_page_full() in 'exec/cputlb.h' exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[14/24] exec: Declare tlb_init/destroy() in 'exec/cputlb.h' exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[13/24] exec: Declare tlb_reset_dirty*() in 'exec/cputlb.h' exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[12/24] accel/tcg: Have tlb_vaddr_to_host() use vaddr type exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[11/24] exec: Introduce 'user/guest-host.h' header exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[10/24] target/arm/cpu: Restrict cpu_untagged_addr() to user emulation exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[09/24] target/arm/mte: Restrict 'exec/ram_addr.h' to system emulation exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[08/24] linux-user/aarch64/mte: Include missing 'user/abitypes.h' header exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[07/24] system/watchpoint: Include missing 'exec/cpu-all.h' header exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[06/24] target/rx/cpu: Include missing 'exec/translation-block.h' header exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[05/24] target/i386/helper: Include missing 'exec/translation-block.h' header exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[04/24] accel/tcg: Include missing 'exec/translation-block.h' header exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[03/24] exec/translation-block: Include missing 'exec/vaddr.h' header exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
[02/24] exec/cpu-defs: Remove unnecessary headers exec: Build up 'cputlb.h' and 'ram_addr.h' headers --- 2024-11-14 Philippe Mathieu-Daudé New
« 1 2 3 4 … 409 410 »