| Message ID | 20240627180350.128575-4-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | util: Add cpuinfo support for riscv | expand |
On 6/27/24 3:03 PM, Richard Henderson wrote: > With recent linux kernels, there is a syscall to probe for various > ISA extensions. These bits were phased in over several kernel > releases, so we still require checks for symbol availability. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > meson.build | 6 ++++++ > util/cpuinfo-riscv.c | 26 ++++++++++++++++++++++++++ > 2 files changed, 32 insertions(+) > > diff --git a/meson.build b/meson.build > index 97e00d6f59..58afd0125d 100644 > --- a/meson.build > +++ b/meson.build > @@ -2837,6 +2837,12 @@ have_cpuid_h = cc.links(''' > }''') > config_host_data.set('CONFIG_CPUID_H', have_cpuid_h) > > +# Don't bother to advertise asm/hwprobe.h for old versions that do > +# not contain RISCV_HWPROBE_EXT_ZBA. > +config_host_data.set('CONFIG_ASM_HWPROBE_H', > + cc.has_header_symbol('asm/hwprobe.h', > + 'RISCV_HWPROBE_EXT_ZBA')) > + FWIW I looked around Linux and I think we can snapshot hwprobe support by checking for RISCV_HWPROBE_KEY_IMA_EXT_0 (Linux commit 162e4df137c) if we ever need hwprobe for exts earlier than ZBA (C and V). Checking for ZBA is fine for this patch though. Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > config_host_data.set('CONFIG_AVX2_OPT', get_option('avx2') \ > .require(have_cpuid_h, error_message: 'cpuid.h not available, cannot enable AVX2') \ > .require(cc.links(''' > diff --git a/util/cpuinfo-riscv.c b/util/cpuinfo-riscv.c > index abf799794f..cf59ce83a3 100644 > --- a/util/cpuinfo-riscv.c > +++ b/util/cpuinfo-riscv.c > @@ -6,6 +6,11 @@ > #include "qemu/osdep.h" > #include "host/cpuinfo.h" > > +#ifdef CONFIG_ASM_HWPROBE_H > +#include <asm/hwprobe.h> > +#include <sys/syscall.h> > +#endif > + > unsigned cpuinfo; > static volatile sig_atomic_t got_sigill; > > @@ -47,6 +52,27 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) > #endif > left &= ~info; > > +#ifdef CONFIG_ASM_HWPROBE_H > + if (left) { > + /* > + * TODO: glibc 2.40 will introduce <sys/hwprobe.h>, which > + * provides __riscv_hwprobe and __riscv_hwprobe_one, > + * which is a slightly cleaner interface. > + */ > + struct riscv_hwprobe pair = { .key = RISCV_HWPROBE_KEY_IMA_EXT_0 }; > + if (syscall(__NR_riscv_hwprobe, &pair, 1, 0, NULL, 0) == 0 > + && pair.key >= 0) { > + info |= pair.value & RISCV_HWPROBE_EXT_ZBA ? CPUINFO_ZBA : 0; > + info |= pair.value & RISCV_HWPROBE_EXT_ZBB ? CPUINFO_ZBB : 0; > + left &= ~(CPUINFO_ZBA | CPUINFO_ZBB); > +#ifdef RISCV_HWPROBE_EXT_ZICOND > + info |= pair.value & RISCV_HWPROBE_EXT_ZICOND ? CPUINFO_ZICOND : 0; > + left &= ~CPUINFO_ZICOND; > +#endif > + } > + } > +#endif /* CONFIG_ASM_HWPROBE_H */ > + > if (left) { > struct sigaction sa_old, sa_new; >
On 7/2/24 15:15, Daniel Henrique Barboza wrote: > > > On 6/27/24 3:03 PM, Richard Henderson wrote: >> With recent linux kernels, there is a syscall to probe for various >> ISA extensions. These bits were phased in over several kernel >> releases, so we still require checks for symbol availability. >> >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> >> --- >> meson.build | 6 ++++++ >> util/cpuinfo-riscv.c | 26 ++++++++++++++++++++++++++ >> 2 files changed, 32 insertions(+) >> >> diff --git a/meson.build b/meson.build >> index 97e00d6f59..58afd0125d 100644 >> --- a/meson.build >> +++ b/meson.build >> @@ -2837,6 +2837,12 @@ have_cpuid_h = cc.links(''' >> }''') >> config_host_data.set('CONFIG_CPUID_H', have_cpuid_h) >> +# Don't bother to advertise asm/hwprobe.h for old versions that do >> +# not contain RISCV_HWPROBE_EXT_ZBA. >> +config_host_data.set('CONFIG_ASM_HWPROBE_H', >> + cc.has_header_symbol('asm/hwprobe.h', >> + 'RISCV_HWPROBE_EXT_ZBA')) >> + > > FWIW I looked around Linux and I think we can snapshot hwprobe support by > checking for RISCV_HWPROBE_KEY_IMA_EXT_0 (Linux commit 162e4df137c) if we > ever need hwprobe for exts earlier than ZBA (C and V). Sure. It'll take some effort to use RVV for TCG vector operations. :-) > > Checking for ZBA is fine for this patch though. > > > Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Thanks. r~
On Fri, Jun 28, 2024 at 4:06 AM Richard Henderson <richard.henderson@linaro.org> wrote: > > With recent linux kernels, there is a syscall to probe for various > ISA extensions. These bits were phased in over several kernel > releases, so we still require checks for symbol availability. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > meson.build | 6 ++++++ > util/cpuinfo-riscv.c | 26 ++++++++++++++++++++++++++ > 2 files changed, 32 insertions(+) > > diff --git a/meson.build b/meson.build > index 97e00d6f59..58afd0125d 100644 > --- a/meson.build > +++ b/meson.build > @@ -2837,6 +2837,12 @@ have_cpuid_h = cc.links(''' > }''') > config_host_data.set('CONFIG_CPUID_H', have_cpuid_h) > > +# Don't bother to advertise asm/hwprobe.h for old versions that do > +# not contain RISCV_HWPROBE_EXT_ZBA. > +config_host_data.set('CONFIG_ASM_HWPROBE_H', > + cc.has_header_symbol('asm/hwprobe.h', > + 'RISCV_HWPROBE_EXT_ZBA')) > + > config_host_data.set('CONFIG_AVX2_OPT', get_option('avx2') \ > .require(have_cpuid_h, error_message: 'cpuid.h not available, cannot enable AVX2') \ > .require(cc.links(''' > diff --git a/util/cpuinfo-riscv.c b/util/cpuinfo-riscv.c > index abf799794f..cf59ce83a3 100644 > --- a/util/cpuinfo-riscv.c > +++ b/util/cpuinfo-riscv.c > @@ -6,6 +6,11 @@ > #include "qemu/osdep.h" > #include "host/cpuinfo.h" > > +#ifdef CONFIG_ASM_HWPROBE_H > +#include <asm/hwprobe.h> > +#include <sys/syscall.h> > +#endif > + > unsigned cpuinfo; > static volatile sig_atomic_t got_sigill; > > @@ -47,6 +52,27 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) > #endif > left &= ~info; > > +#ifdef CONFIG_ASM_HWPROBE_H > + if (left) { > + /* > + * TODO: glibc 2.40 will introduce <sys/hwprobe.h>, which > + * provides __riscv_hwprobe and __riscv_hwprobe_one, > + * which is a slightly cleaner interface. > + */ > + struct riscv_hwprobe pair = { .key = RISCV_HWPROBE_KEY_IMA_EXT_0 }; > + if (syscall(__NR_riscv_hwprobe, &pair, 1, 0, NULL, 0) == 0 > + && pair.key >= 0) { > + info |= pair.value & RISCV_HWPROBE_EXT_ZBA ? CPUINFO_ZBA : 0; > + info |= pair.value & RISCV_HWPROBE_EXT_ZBB ? CPUINFO_ZBB : 0; > + left &= ~(CPUINFO_ZBA | CPUINFO_ZBB); > +#ifdef RISCV_HWPROBE_EXT_ZICOND > + info |= pair.value & RISCV_HWPROBE_EXT_ZICOND ? CPUINFO_ZICOND : 0; > + left &= ~CPUINFO_ZICOND; > +#endif > + } > + } > +#endif /* CONFIG_ASM_HWPROBE_H */ > + > if (left) { > struct sigaction sa_old, sa_new; > > -- > 2.34.1 > >
diff --git a/meson.build b/meson.build index 97e00d6f59..58afd0125d 100644 --- a/meson.build +++ b/meson.build @@ -2837,6 +2837,12 @@ have_cpuid_h = cc.links(''' }''') config_host_data.set('CONFIG_CPUID_H', have_cpuid_h) +# Don't bother to advertise asm/hwprobe.h for old versions that do +# not contain RISCV_HWPROBE_EXT_ZBA. +config_host_data.set('CONFIG_ASM_HWPROBE_H', + cc.has_header_symbol('asm/hwprobe.h', + 'RISCV_HWPROBE_EXT_ZBA')) + config_host_data.set('CONFIG_AVX2_OPT', get_option('avx2') \ .require(have_cpuid_h, error_message: 'cpuid.h not available, cannot enable AVX2') \ .require(cc.links(''' diff --git a/util/cpuinfo-riscv.c b/util/cpuinfo-riscv.c index abf799794f..cf59ce83a3 100644 --- a/util/cpuinfo-riscv.c +++ b/util/cpuinfo-riscv.c @@ -6,6 +6,11 @@ #include "qemu/osdep.h" #include "host/cpuinfo.h" +#ifdef CONFIG_ASM_HWPROBE_H +#include <asm/hwprobe.h> +#include <sys/syscall.h> +#endif + unsigned cpuinfo; static volatile sig_atomic_t got_sigill; @@ -47,6 +52,27 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) #endif left &= ~info; +#ifdef CONFIG_ASM_HWPROBE_H + if (left) { + /* + * TODO: glibc 2.40 will introduce <sys/hwprobe.h>, which + * provides __riscv_hwprobe and __riscv_hwprobe_one, + * which is a slightly cleaner interface. + */ + struct riscv_hwprobe pair = { .key = RISCV_HWPROBE_KEY_IMA_EXT_0 }; + if (syscall(__NR_riscv_hwprobe, &pair, 1, 0, NULL, 0) == 0 + && pair.key >= 0) { + info |= pair.value & RISCV_HWPROBE_EXT_ZBA ? CPUINFO_ZBA : 0; + info |= pair.value & RISCV_HWPROBE_EXT_ZBB ? CPUINFO_ZBB : 0; + left &= ~(CPUINFO_ZBA | CPUINFO_ZBB); +#ifdef RISCV_HWPROBE_EXT_ZICOND + info |= pair.value & RISCV_HWPROBE_EXT_ZICOND ? CPUINFO_ZICOND : 0; + left &= ~CPUINFO_ZICOND; +#endif + } + } +#endif /* CONFIG_ASM_HWPROBE_H */ + if (left) { struct sigaction sa_old, sa_new;
With recent linux kernels, there is a syscall to probe for various ISA extensions. These bits were phased in over several kernel releases, so we still require checks for symbol availability. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- meson.build | 6 ++++++ util/cpuinfo-riscv.c | 26 ++++++++++++++++++++++++++ 2 files changed, 32 insertions(+)