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Show patches with
: Series =
target/arm: Convert a64 advsimd to decodetree (part 1)
| State =
Action Required
| Archived =
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| 12 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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[v2,45/67] target/arm: Convert SRSHL, URSHL to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,43/67] target/arm: Convert SSHL, USHL to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,38/67] target/arm: Convert SUQADD and USQADD to gvec
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,33/67] target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,29/67] target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,22/67] target/arm: Expand vfp neg and abs inline
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,19/67] target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,18/67] target/arm: Convert FMULX to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,08/67] target/arm: Split out gengvec64.c
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,07/67] target/arm: Split out gengvec.c
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,03/67] target/arm: Reject incorrect operands to PLD, PLDW, PLI
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,01/67] target/arm: Add neoverse-n1 to qemu-arm (DO NOT MERGE)
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New