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: Series =
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
| State =
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| Archived =
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| 6 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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[15/20] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New
[11/20] hw/net/xilinx_ethlite: Access RX_CTRL register for each port
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New
[10/20] hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New
[08/20] hw/net/xilinx_ethlite: Add addr_to_port_index() helper
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New
[07/20] hw/net/xilinx_ethlite: Rename rxbuf -> port_index
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New
[05/20] hw/net/xilinx_ethlite: Correct maximum RX buffer size
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New